AD8345
BASIC CONNECTIONS
IP
AD8345
1
2
3
4
5
6
7
8
QP
QN
16
QBBP
IBBP
IBBN
COM3
COM1
LOIN
LOIP
QBBN 15
IN
14
13
12
11
10
9
COM3
COM3
VPS2
C6
1000pF
5
1
2
3
+V
LO
S
C1
1000pF
C2
0.01μF
T1
R1
50Ω
C7
1000pF
ETC1-1-13
VOUT
COM2
COM3
VOUT
4
C5
1000pF
VPS1
ENBL
+V
S
C4
C3
0.01μF
1000pF
Figure 28. Basic Connections
The basic connections for operating the AD8345 are shown in
Figure 28. A single power supply of between 2.7 V and 5.5 V is
applied to the VPS1 pin and the VPS2 pin. A pair of ESD
protection diodes is connected internally between the VPS1 pin
and the VPS2 pin so these must be tied to the same potential.
Both pins should be individually decoupled using 1000 pF and
0.01 μF capacitors, located as close as possible to the device. For
normal operation, the enable pin (ENBL) must be pulled high.
The turn-on threshold for ENBL is VS/2. COM1 to COM3
should all be tied to the same low impedance ground plane.
LO FREQUENCY RANGE
The frequency range on the LO input is limited by the internal
quadrature phase splitter. The phase splitter generates drive
signals for the internal mixers which are 90° out of phase
relative to one another.
Outside of the specified LO frequency range of 140 MHz to 1 GHz,
this quadrature accuracy degrades, resulting in decreased sideband
suppression. See Figure 11 for a plot of sideband suppression vs.
LO frequency from 250 MHz to 1 GHz. Figure 29 shows the
sideband suppression of a typical device from 70 MHz to 300 MHz.
LO DRIVE
0
In Figure 28, a 50 Ω resistor to ground combines with the
device’s high input impedance to provide an overall input
impedance of approximately 50 Ω (see Figure 19 for a plot of
LO port input impedance). For maximum LO suppression at
the output, a differential LO drive is recommended. In
Figure 28, this is achieved using a balun (M/A-COM part
number ETC1-1-13).
–5
V
= 5V, DIFFERENTIAL INPUT = 1.2V
S
–10
–15
–20
–25
–30
–35
–40
–45
–50
The outputs of the balun are ac-coupled to the LO inputs, which
have a bias level of approximately 1.8 V dc. An LO drive level of
−2 dBm is recommended for lowest output noise. Higher levels
degrade linearity while lower levels tend to increase the noise
floor slightly. For example, reducing the LO power from −2 dBm
to −10 dBm increases the noise floor by approximately 0.3 dB
(see Figure 21).
40 60 80 100 120 140 160 180 200 220 240 260 280 300
LO FREQUENCY (MHz)
Figure 29. Typical Lower Frequency Sideband Suppression Performance
The LO input pins can be driven single-ended at the expense of
slightly higher LO leakage. LOIN is ac-coupled to ground using
a capacitor and LOIP is driven through a coupling capacitor
from a (single-ended) 50 Ω source. (This scheme could also be
reversed with the drive signal being applied to LOIN.)
Rev. B | Page 12 of 20
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