AD8345
SPECIFICATIONS
V
S
= 5 V; LO = −2 dBm @ 800 MHz; 50 Ω source and load impedances; I and Q inputs 0.7 V ±0.3 V on each side for a 1.2 V p-p
differential input, I and Q inputs driven in quadrature @ 1 MHz baseband frequency. T
A
= 25°C, unless otherwise noted.
Table 1.
Parameter
RF OUTPUT
Operating Frequency
Output Power
Min
140
0.5
0.5
−1
2.5
−155
0.5
0.2
−41
−40
−42
−33
−48
−42
−52
−60
25
59
−20
Typ
Max
1000
Unit
MHz
dBm
dBm
dBm
dBm
dBm/Hz
Degree rms
dB
dBm
dBm
dBm
dBc
dBc
dBc
dBc
dBc
dBm
dBm
dB
Test Conditions/Comments
−3
Output P1dB
Noise Floor
Quadrature Error
I/Q Amplitude Balance
LO Leakage
+2
140 MHz
220 MHz
800 MHz
20 MHz offset from LO, all BB inputs at 0.7 V
CDMA IS95 setup (see Figure 38)
CDMA IS95 setup (see Figure 38)
140 MHz
220 MHz
800 MHz
140 MHz
220 MHz
800 MHz
−33
−40
−34
Sideband Rejection
Third Order Distortion
Second Order Distortion
Equivalent Output IP3
Equivalent Output IP2
Output Return Loss (S22)
RESPONSE TO CDMA IS95
BASEBAND SIGNALS
ACPR
EVM
Rho
LO INPUT
LO Drive level
LOIP Input Return Loss (S11)
See Figure 38
−72
1.3
0.9995
−10
−2
−5
−9
0
dBc
%
dBm
dB
dB
μA
pF
V
MHz
μs
μs
V
V
No termination on LOIP, LOIN at ac ground
50 Ω terminating resistor, differential drive via balun
BASEBAND INPUTS
Input Bias Current
Input Capacitance
DC Common Level
Bandwidth (3 dB)
ENABLE
Turn-On
Turn-Off
ENBL High Threshold (Logic 1)
ENBL Low Threshold (Logic 0)
POWER SUPPLIES
Voltage
Current Active
Current Standby
1
2
0.6
10
2
0.7
80
2.5
1.5
+V
S
/2
+V
S
/2
0.8
Full power (0.7 V ±0.3 V on each input, see Figure 4)
Enable high to output within 0.5 dB of final value
Enable low to supply current dropping below 2 mA
2.7
50
65
70
5.5
78
V
mA
μA
For information on operation below 140 MHz, see Figure 29.
See the LO Interface section for more details on input matching.
Rev. B | Page 3 of 20
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