AD8314
OPERATION AT 2.7 GHz
While the AD8314 is specified to operate at frequencies up to
2.5 GHz, it works at higher frequencies, although it does exhibit
slightly higher output voltage temperature drift. Figure 43
shows the transfer function of a typical device at 2.7 GHz, at
ambient as well as hot and cold temperatures.
driven by both an unmodulated sine wave and a 64 QAM
signal. As previously discussed, the higher peak-to-average ratio
of the 64 QAM signal causes an increase in the intercept.
In this case, the intercept increases by approximately 1.5 dB,
causing the overall transfer function to drop by the same
amount. For precision operation, the AD8314 should be
calibrated for each signal type that is driving it.
USING THE LFCSP PACKAGE
On the underside of the LFCSP package, there is an exposed,
compressed paddle. This paddle is internally connected to the
chip’s ground. While the paddle can be connected to the printed
circuit board’s ground plane, there is no thermal or electrical
requirement to do this.
EVALUATION BOARD
evaluation board. The layout and silkscreen of the component
side are shown in Figure 46 and Figure 47. An evaluation board
is also available for the LFCSP package. (For exact part numbers,
see the Ordering Guide.) Apart from the slightly smaller device
footprint, the LFCSP evaluation board is identical to the MSOP
board. The board is powered by a single supply in the 2.7 V to
5.5 V range. The power supply is decoupled by a single 0.1 μF
capacitor. Additional decoupling, in the form of a series resistor
or inductor in R9, can also be added. Table 7 details the various
configuration options of the evaluation board.
1.2
3
1.2
3
+25°C
1.0
2
1.0
CW
2
+25°C
0.8
–40°C
–40°C
1
0.8
1
ERROR (dB)
0.6
0
0.6
0
0.4
–1
0.4
+80°C
0.2
64 QAM
–1
+80°C
–2
0.2
64 QAM
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–2
–60
–50
–40
–30
–20
–10
0
–60
–50
–40
–30
–20
–10
0
INPUT POWER (dBm)
INPUT POWER (dBm)
Figure 43. Operating at 2.7 GHz
Figure 44. Shift in Transfer Function due to 64 QAM
R2
52.3Ω
R1
0Ω
VPOS
2 ENBL
SW1
VSET
LK1
3 VSET
4 FLTR
C4
(OPEN)
R7
0Ω
V_DN 7
V_UP 6
COMM 5
C1
0.1µF
R9
0Ω
R3
0Ω
R4
(OPEN)
R5
0Ω
R6
(OPEN)
C3
(OPEN)
C2
(OPEN)
INPUT
1 RFIN
VPOS 8
V
POS
V_DN
AD8314
V_UP
01086-045
R8
OPEN
Figure 45. Evaluation Board Schematic
Rev. B | Page 18 of 20
01086-044
0
–70
–3
10
0
–70
–3
10
ERROR (dB)
CW
V
UP
(V)
V
UP
(V)
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