AD8313
With Pins 7 and 8 connected (log amp mode), the output can be
stated as
V
OUT
=
V
SLOPE
(
P
IN
+
100 dBm)
With Pins 7 and 8 disconnected (controller mode), the output
can be stated as
V
OUT
→
V
S
V
OUT
→
0
when
V
SLOPE
log (
P
IN
/ 100)
>
V
SET
when
V
SLOPE
log (
P
IN
/ 100)
<
V
SET
where
P
IN
is the input power stated in dBm when the source is
directly terminated in 50 Ω. However, the input impedance of
the AD8313 is much higher than 50 Ω, and the sensitivity of this
device may be increased by about 12 dB by using some type of
matching network (see below), which adds a voltage gain and
lowers the intercept by the same amount. Dependence on the ref-
erence impedance can be avoided by restating the expression as
V
OUT
=
20
×
V
SLOPE
×
log
×
(
V
IN
/ 2.2
µ
V)
when the input is stated in terms of the power of a sinusoidal
signal across a net termination impedance of 50 Ω. The transition
zone between high and low states is very narrow since the output
stage behaves essentially as a fast integrator. The above equations
can be restated as
V
OUT
→
V
S
V
OUT
→
0
when
V
SLOPE
log (
V
IN
/ 2.2
µ
V)
>
V
SET
when
V
SLOPE
log (
V
IN
/ 2.2
µ
V)
<
V
SET
where
V
IN
is the rms value of a sinusoidal input appearing
across Pins 2 and 3; here, 2.2 µV corresponds to the intercept,
expressed in voltage terms. For detailed information on the
effect of signal waveform and metrics on the intercept
positioning for a log amp, refer to the AD8307 data sheet.
Another use of the separate VOUT and VSET pins is in raising
the load-driving current capability by including an external
NPN emitter follower. More complete information about usage
in these modes is provided in the Applications section.
Rev. D | Page 12 of 24
AD [ ANALOG DEVICES ]
