AD830
UND ERSTAND ING TH E AD 830 TO P O LO GY
V
V
X1
T he AD830 represents Analog Devices’ first amplifier product
to embody a powerful alternative amplifier topology. Referred to
as active feedback, the topology used in the AD830 provides in-
herent advantages in the handling of differential signals, differ-
ing system commons, level shifting and low distortion, high
frequency amplification. In addition, it makes possible the
implementation of many functions not realizable with single op
amp circuits or is superior to op amp based equivalent circuits.
With this in mind, it is important to understand the internal
structure of the AD830.
G
M
X2
I
I
X
A=1
V
OUT
Y
C
C
V
V
Y1
G
M
Y2
T he topology, reduced to its elemental form, is shown below in
Figure 21. Nonideal effects such as nonlinearity, bias currents
and limited full scale are omitted from this model for simplicity,
but are discussed later. T he key feature of this topology is the
use of two, identical voltage-to-current converters, GM, that
make up input and feedback signal interfaces. T hey are labeled
with inputs VX and VY, respectively. T hese voltage to current
converters possess fully differential inputs, high linearity, high
input impedance and wide voltage range operation. T his enables
the part to handle large amplitude differential signals; they also
provide high common-mode rejection, low distortion and negli-
gible loading on the source. T he label, GM, is meant to convey
that the transconductance is a large signal quantity, unlike in the
front-end of most op amps. T he two GM stage current outputs
IX and IY, sum together at a high impedance node which is char-
acterized by an equivalent resistance and capacitance connected
to an “ac common.” A unity voltage gain stage follows the high
impedance node to provide buffering from loads. Relative to
either input, the open loop gain, AOL, is set by the
V
– V = V – V
X2 Y Y1
2
X1
FOR V = V
Y2
OUT
1
1 + S(C /G
V
= (V – V + V
)
Y1
OUT
X1
X2
)
M
C
Figure 22. Closed-Loop Connection
Precise amplification is accomplished through closed-loop op-
eration of this topology. Voltage feedback is implemented via
the Y GM stage in which where the output is connected to the
–Y input for negative feedback as shown in Figure 22. An input
signal is applied across the X GM stage, either fully differentially
or single-ended referred to common. It produces a current sig-
nal which is summed at the high impedance node with the out-
put current from the Y GM stage. Negative feedback nulls this
sum to a small error current necessary to develop the output
voltage at the high impedance node. T he error current is usually
negligible, so the null condition essentially forces the Y GM
output stage current to exactly equal the X GM output current.
Since the two transconductances are identical, the differential
voltage across the Y inputs equals the negative of the differential
voltage across the X input; VY = –VX or more precisely
transconductance, GM, working into the resistance, RP; AOL
=
GM ϫ RP. T he unity gain frequency ω0 dB for the open loop gain
is established by the transconductance, GM, working into the
capacitance, CC; ω0 dB = GM/CC. T he open loop description of
the AD830 is shown below for completeness.
V
Y2–VY1 = VX1–VX2. T his simple relation provides the basis to
easily analyze any function possible to synthesize with the
AD830, including any feedback situation.
T he bandwidth of the circuit is defined by the GM and the
capacitor CC. T he highly linear GM stages give the amplifier a
single pole response, excluding the output amplifier and loading
effects. It is important to note that the bandwidth and general dy-
namic behavior is symmetrical (identical) for the noninverting and
the inverting connections of the AD830. In addition, the input im-
pedance and CMRR are the same for either connections. T his is
very advantageous and unlike in a voltage or current feedback
amplifier, where there is a distinct difference in performance be-
tween the inverting and noninverting gain. T he practical impor-
tance of this cannot be overemphasized and is a key feature
offered by the AD830 amplifier topology.
V
X1
X2
G
M
V
I
I
X
Y
I
Z
A=1
V
OUT
I
I
I
= (V – V ) G
X1 X2 M
X
Y
Z
V
V
Y1
= (V – V ) G
Y1
Y2
M
C
R
G
C
P
M
= I + I
X
Y
Y2
G
R
M
P
A
=
OLS
1 + S (C R )
C
P
Figure 21. Topology Diagram
REV. A
–9–
ADI [ ADI ]
