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AD8307ARZ 参数 Datasheet PDF下载

AD8307ARZ图片预览
型号: AD8307ARZ
PDF下载: 下载PDF文件 查看货源
内容描述: 低成本DC - 500 MHz的92分贝对数放大器 [Low Cost DC-500 MHz, 92 dB Logarithmic Amplifier]
分类和应用: 模拟计算功能信号电路放大器光电二极管PC
文件页数/大小: 24 页 / 510 K
品牌: AD [ ANALOG DEVICES ]
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AD8307
SPECIFICATIONS
V
S
= 5 V, T
A
= 25°C, R
L
≥ 1 MΩ, unless otherwise noted.
Table 1.
Parameter
GENERAL CHARACTERISTICS
Input Range (±3 dB Error)
Input Range (±1 dB Error)
Logarithmic Conformance
Logarithmic Slope
vs. Temperature
Logarithmic Intercept
vs. Temperature
Input Noise Spectral Density
Operating Noise Floor
Output Resistance
Internal Load Capacitance
Response Time
Conditions
From noise floor to maximum input
From noise floor to maximum input
f ≤ 100 MHz, central 80 dB
f = 500 MHz, central 75 dB
Unadjusted
1
Sine amplitude, unadjusted
2
Equivalent sine power in 50 Ω
Inputs shorted
R
SOURCE
= 50 Ω/2
Pin 4 to ground
Small signal, 10% to 90%,
0 mV to100 mV, C
L
= 2 pF
Large signal, 10% to 90%,
0 V to 2.4 V, C
L
= 2 pF
AC-coupled input
−3 dB
Min
Typ
92
88
±0.3
±0.5
25
20
−84
1.5
−78
12.5
3.5
400
500
500
10
900
14.3
3.2
1.6
50
0.8
1.1
1.4
10
Max
Unit
dB
dB
dB
dB
mV/dB
mV/dB
μV
dBm
dBm
nV/√Hz
dBm
pF
ns
ns
MHz
Hz
MHz
dB
V
V
μV
μV/°C
pF
μA
V
mA
μA
±1
27
27
−77
−76
23
23
−87
−88
10
15
Upper Usable Frequency
3
Lower Usable Frequency
AMPLIFIER CELL CHARACTERISTICS
Cell Bandwidth
Cell Gain
INPUT CHARACTERISTICS
DC Common-Mode Voltage
Common-Mode Range
DC Input Offset Voltage
4
Incremental Input Resistance
Input Capacitance
Bias Current
POWER INTERFACES
Supply Voltage
Supply Current
Disabled
1
2
AC-coupled input
Either input (small signal)
R
SOURCE
≤ 50 Ω
Drift
Differential
Either pin to ground
Either input
−0.3
V
S
− 1
500
25
5.5
10
750
2.7
V
ENB
≥ 2 V
V
ENB
≤ 1 V
8
150
This can be adjusted downward by adding a shunt resistor from the output to ground. A 50 kΩ resistor reduces the nominal slope to 20 mV/dB.
This can be adjusted in either direction by a voltage applied to Pin 5, with a scale factor of 8 dB/V.
3
See the Operation Above 500 MHz section.
4
Normally nulled automatically by internal offset correction loop. May be manually nulled by a voltage applied between Pin 3 and ground; see the
Applications Information section.
Rev. C | Page 3 of 24