AD820
100
100
100
90
80
PHASE
OPEN-LOOP GAIN – dB
60
GAIN
40
40
60
COMMON-MODE REJECTION – dB
80
PHASE MARGIN IN DEGREES
80
70
60
50
40
30
20
10
–20
10M
0
10
100
1k
10k
100k
FREQUENCY – Hz
1M
10M
V
S
= 0V, 5V
AND
V
S
= 0V, 3V
V
S
=
15V
20
R
L
= 2k
C
L
= 100pF
20
0
0
–20
10
100
1k
10k
100k
FREQUENCY – Hz
1M
Figure 15. Open-Loop Gain and Phase Margin vs.
Frequency
Figure 18. Common-Mode Rejection vs. Frequency
1k
COMMON-MODE ERROR VOLTAGE – mV
A
CL
= +1
V
S
= 15V
100
OUTPUT IMPEDANCE –
5
4
10
3
NEGATIVE
RAIL
POSITIVE
RAIL
1
2
+25 C
+125 C
1
–55 C
–55 C
+125 C
0.1
0.01
100
0
1k
10k
100k
FREQUENCY – Hz
1M
10M
–1
0
1
2
3
COMMON-MODE VOLTAGE FROM SUPPLY RAILS – Volts
Figure 16. Output Impedance vs. Frequency
Figure 19. Absolute Common-Mode Error vs. Common-
Mode Voltage from Supply Rails (V
S
– V
CM
)
16
12
1%
8
4
0
–4
–8
–12
–16
0.0
0.1%
0.01%
ERROR
1000
OUTPUT SATURATION VOLTAGE – mV
OUTPUT SWING FROM 0 TO
Volts
100
V
S
– V
OH
V
OL
– V
S
10
1%
1.0
2.0
3.0
SETTLING TIME – s
4.0
5.0
0
0.001
0.01
0.1
1
LOAD CURRENT – mA
10
100
Figure 17. Output Swing and Error vs. Settling Time
Figure 20. Output Saturation Voltage vs Load Current
-
REV. B
–9–
AD [ ANALOG DEVICES ]
