AD817
+V
A H IGH P ERFO RMANCE AD C INP UT BUFFER
High performance analog to digital converters (ADCs) require
input buffers with correspondingly high bandwidths and very
low levels of distortion. T ypical requirements include distortion
levels of –60 dB to –70 dB for a 1 volt p-p signal and band-
widths of 10 MHz or more. In addition, an ADC buffer may
need to drive very large capacitive loads.
S
R3
1kΩ
3.3µF
SELECT C1, R1, R2 & R3
FOR DESIRED LOW
FREQUENCY CORNER.
(R2 = R1 + R3)
C2
0.1µF
0.01µF
R1
9kΩ
T he circuit of Figure 36 is useful for driving high speed convert-
ers such as the differential input of the AD733, 10-bit ADC.
T his circuit may be used with other converters with only minor
modifications. Using the AD817 provides the user with the op-
tion of either operating the buffer in differential mode or from a
single +5 volt supply. Operating from a +5 volt power supply
helps to avoid overdriving the ADC—a common problem with
buffers operating at higher supply voltages.
7
C
OUT
2
3
C1
0.1µF
6
V
AD817
OUT
V
R
150Ω
IN
L
4
C
L
200pF
R2
10kΩ
C3
0.1µF
Figure 37. Single Supply Am plifier Configuration
SINGLE SUP P LY O P ERATIO N
Combining R3 with C2 forms a low-pass filter with a corner
frequency of 1.5 kHz. T his is needed to maintain amplifier
PSRR, since the supply is connected to VIN through the input
divider. T he values for RL and CL were chosen to demonstrate
the AD817’s exceptional output drive capability. In this con-
figuration, the output is centered around 2.5 V. In order to
eliminate the static dc current associated with this level, C3 was
inserted in series with RL.
Another exciting feature of the AD817 is its ability to perform
well in a single supply configuration. T he AD817 is ideally
suited for applications that require low power dissipation and
high output current and those which need to drive large capaci-
tive loads, such as high speed buffering and instrumentation.
Referring to Figure 37, careful consideration should be given to
the proper selection of component values. T he choices for this
particular circuit are: R1+ R3//R2 combine with C1 to form a
low frequency corner of approximately 300 Hz.
1kΩ
+V
S
0.1µF
1kΩ
7
2
3
V
AD817
6
26
INA
50Ω
COAX
CABLE
0.1µF
4
V
IN
500mVp-p
MAX
AD773
–V
S
52.5Ω
10-BIT
18MHz
ADC
+V
S
0.1µF
7
3
2
AD817
6
27 V
INB
1kΩ
0.1µF
4
+V
+5V
COMMON
–5V
S
–V
S
100µF
25V
ADREF43
VOLTAGE
REFERENCE
+2.5V
1kΩ
100µF
25V
–V
S
Figure 36. A Differential Input Buffer for High Bandwidth ADCs
REV. B
–11–
ADI [ ADI ]
