AD8138
OPERATIONAL DESCRIPTION
Definition of Terms
circuit. Excellent performance over a wide frequency range has
proven difficult with this approach.
The AD8138 uses two feedback loops to separately control the
differential and common-mode output voltages. The differential
feedback, set with external resistors, controls only the differential
output voltage. The common-mode feedback controls only the
common-mode output voltage. This architecture makes it easy to
arbitrarily set the output common-mode level. It is forced, by inter-
nal common-mode feedback, to be equal to the voltage applied to
the VOCM input, without affecting the differential output voltage.
C
F
R
F
R
R
+IN
–IN
G
G
–OUT
+D
IN
V
V
R
L,dm
AD8138
,dm
OUT
OCM
–D
IN
+OUT
R
C
F
The AD8138 architecture results in outputs that are very highly
balanced over a wide frequency range without requiring tightly
matched external components. The common-mode feedback
loop forces the signal component of the output common-mode
voltage to be zeroed. The result is nearly perfectly balanced
differential outputs of identical amplitude and exactly 180∞ apart
in phase.
F
Figure 2. Circuit Definitions
Differential voltage refers to the difference between two
node voltages. For example, the output differential voltage
(or equivalently output differential-mode voltage) is defined as:
Analyzing an Application Circuit
VOUT,dm = V
-V-OUT
(
)
+OUT
The AD8138 uses high open-loop gain and negative feedback to
force its differential and common-mode output voltages in such
a way as to minimize the differential and common-mode error
voltages. The differential error voltage is defined as the voltage
between the differential inputs labeled +IN and –IN in Figure 2.
For most purposes, this voltage can be assumed to be zero. Simi-
larly, the difference between the actual output common-mode
voltage and the voltage applied to VOCM can also be assumed to
be zero. Starting from these two assumptions, any application
circuit can be analyzed.
V
+OUT and V–OUT refer to the voltages at the +OUT and –OUT
terminals with respect to a common reference.
Common-mode voltage refers to the average of two node
voltages. The output common-mode voltage is defined as:
VOUT,cm = V
+V-OUT
2
(
)
+OUT
Balance is a measure of how well differential signals are matched
in amplitude and exactly 180Њ apart in phase. Balance is most
easily determined by placing a well-matched resistor divider
between the differential voltage nodes and comparing the magni-
tude of the signal at the divider’s midpoint with the magnitude
of the differential signal (see TPC 26). By this definition, output
balance is the magnitude of the output common-mode voltage
divided by the magnitude of the output differential-mode voltage:
Setting the Closed-Loop Gain
Neglecting the capacitors CF, the differential-mode gain of the
circuit in Figure 2 can be determined to be described by the
following equation:
S
VOUT,dm
RF
RG
=
VOUT,cm
S
VIN,dm
Output Balance Error =
VOUT,dm
This assumes the input resistors, RGS, and feedback resistors,
RFS, on each side are equal.
THEORY OF OPERATION
The AD8138 differs from conventional op amps in that it has
two outputs whose voltages move in opposite directions. Like an
op amp, it relies on high open-loop gain and negative feedback
to force these outputs to the desired voltages. The AD8138
behaves much like a standard voltage feedback op amp and makes
it easy to perform single-ended-to-differential conversion, common-
mode level-shifting, and amplification of differential signals. Also
like an op amp, the AD8138 has high input impedance and low
output impedance.
Estimating the Output Noise Voltage
Similar to the case of a conventional op amp, the differential
output errors (noise and offset voltages) can be estimated by
multiplying the input referred terms, at +IN and –IN, by the
circuit noise gain. The noise gain is defined as:
Ê
ˆ
RF
GN = 1+
Á
Ë
˜
¯
R
G
To compute the total output referred noise for the circuit of
Figure 2, consideration must also be given to the contribution of
the resistors RF and RG. Refer to Table I for estimated output
noise voltage densities at various closed-loop gains.
Previous differential drivers, both discrete and integrated designs,
have been based on using two independent amplifiers and two
independent feedback loops, one to control each of the outputs.
When these circuits are driven from a single-ended source, the
resulting outputs are typically not well balanced. Achieving a
balanced output has typically required exceptional matching of
the amplifiers and feedback networks.
Table I.
RG RF
Bandwidth Output Noise Output Noise
Gain (⍀) (⍀)
–3 dB
8138 Only
8138 + RG, RF
DC common-mode level-shifting has also been difficult with
previous differential drivers. Level-shifting has required the use
of a third amplifier and feedback loop to control the output
common-mode level. Sometimes the third amplifier has also
been used to attempt to correct an inherently unbalanced
1
499 499
320 MHz
10 nV/÷Hz
15 nV/÷Hz
30 nV/÷Hz
55 nV/÷Hz
11.6 nV/÷Hz
18.2 nV/÷Hz
37.9 nV/÷Hz
70.8 nV/÷Hz
2
5
499 1.0 k 180 MHz
499 2.49 k 70 MHz
499 4.99 k 30 MHz
10
REV. E
–9–
ADI [ ADI ]
