AD8055/AD8056
POWER DISSIPATION LIMITS
NORMALIZED GAIN (dB)
5
4
3
2
1
0
–1
–2
–3
–4
1
10
FREQUENCY (MHz)
100
500
01063-039
01063-041
402Ω
402Ω
V
IN
= 0dBm
C
L
100Ω
C
L
= 30pF
With a 10 V supply (total V
CC
− V
EE
), the quiescent power
dissipation of the AD8055 in the SOT-23-5 package is 65 mW,
while the quiescent power dissipation of the AD8056 in the
MSOP-8 is 120 mW. This translates into a 15.6°C rise above the
ambient for the SOT-23-5 package and a 24°C rise for the
MSOP-8 package.
The power dissipated under heavy load conditions is
approximately equal to the supply voltage minus the output
voltage, times the load current, plus the quiescent power
previously computed. The total power dissipation is then
multiplied by the thermal resistance of the package to find the
temperature rise, above ambient, of the part. The junction
temperature should be kept below 150°C.
The AD8055 in the SOT-23-5 package can dissipate 270 mW,
while the AD8056 in the MSOP-8 package can dissipate
325 mW (at 85°C ambient) without exceeding the maximum
die temperature. In the case of the AD8056, this is greater than
1.5 V rms into 50 Ω, enough to accommodate a 4 V p-p sine
wave signal on both outputs simultaneously. However, because
each output of the AD8055 or AD8056 is capable of supplying
as much as 110 mA into a short circuit, a continuous short-
circuit condition will exceed the maximum safe junction
temperature.
50Ω
C
L
= 20pF
C
L
= 10pF
C
L
= 0pF
–5
0.3
Figure 39. Capacitive Load Drive
In general, to minimize peaking or to ensure the stability for
larger values of capacitive loads, a small series resistor, R
S
, can
be added between the op amp output and the capacitor, C
L
. For
the setup depicted in Figure 40, the relationship between R
S
and
C
L
was empirically derived and is shown in Figure 41. R
S
was
chosen to produce less than 1 dB of peaking in the frequency
response. Note also that after a sharp rise, R
S
quickly settles to
approximately 25 Ω.
402Ω
+5V
RESISTOR SELECTION
flatness vs. frequency for various values of gain.
Table 3.
Gain
+1
+2
+5
+10
R
F
(Ω)
0
402
1k
909
R
G
(Ω)
402
249
100
−3 dB Bandwidth (MHz)
300
160
45
20
V
IN
= 0dBm
0.1µF
402Ω
2
7
10µF
R
S
FET PROBE
V
OUT
C
L
01063-040
AD8055
3
4
6
50Ω
–5V
0.1µF
10µF
Figure 40. Setup for R
S
vs. C
L
40
35
DRIVING CAPACITIVE LOADS
When driving a capacitive load, most op amps exhibit peaking
in the frequency response just before the frequency rolls off.
of +2, with an 100 Ω load that is shunted by various values of
capacitance. It can be seen that under these conditions the part
is still stable with capacitive loads of up to 30 pF.
R
S
(Ω)
30
25
20
15
10
5
0
0
10
20
30
40
C
L
(pF)
50
60
270
Figure 41. R
S
vs. C
L
Rev. J | Page 13 of 16
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