AD8022
Layout Considerations
EVALUATION BOARDS
As is the case with all “hi speed” amplifiers, careful attention to
printed circuit board layout details will prevent associated board
parasitics from becoming problematic. Proper RF design technique
is mandatory. The PCB should have a ground plane covering all
unused portions of the component side of the board to provide a
low-impedance return path. Removing the ground plane from
the area near the input signal lines will reduce stray capacitance.
Chip capacitors should be used for the supply bypassing. One
end of the capacitor connected to the ground plane and the other
no more than 1/8 inch away from each supply pin. An additional
large (0.47 µF to 10 µF) tantalum capacitor should be connected
in parallel, although not necessarily as close, in order to supply
current for fast, large signal changes at the AD8022 output.
Signal lines connecting the feedback and gain resistors should
be as short as possible, minimizing the inductance and stray
capacitance associated with these traces. Locate termination
resistors and loads as close as possible to the input(s) and out-
put respectively. Adhere to stripline design techniques for long
signal traces (greater than about 1 inch). Following these
generic guidelines will improve the performance of the AD8022
in all applications.
The evaluation board layout of Figures 40, 41, and 42 is our
standard dual SOIC noninverting evaluation circuit offering
the ability to evaluate the AD8022 in typical op amp circuits,
is available from Analog Devices Inc. In addition, the AD8022
receiver function may be added to on our ADSL EVAL boards.
The AD8016ARB-EVAL, the AD8016ARP-EVAL, the
AD8017AR-EVAL and AD8018ARU-EVAL boards are avail-
able through Analog Devices. These platforms provide the
capability to fully evaluate the Analog Devices ADSL trans-
ceiver hybrid. All of the ADSL evaluation boards mentioned
above can accommodate the evaluation of the AD8022 as a
receiver amplifier when installed in the U2 location. The receiver
circuit on these boards is typically unpopulated. Requesting
samples of the AD8022 along with the EVAL board of your
choice will provide the capability to evaluate the AD8022 along
with many other Analog Devices ADSL line driver products in a
typical transceiver circuit. The evaluation circuits have been
designed to replicate the CPE or CO side analog transceiver
hybrid circuits.
The ADSL EVAL circuits mentioned above are designed using a
two transformer transceiver topology, including a line receiver, line
driver, line matching network, an RJ11 jack for interfacing to
line simulators, and transformer-coupled inputs for single-to-
differential input conversion.
7.5
2.5
–2.5
–7.5
680pF
5% NPO
–12.5
–17.5
–22.5
–27.5
–32.5
–37.5
12V
1.91k⍀
1%
2.43k⍀
1%
8
AD8022
1
3
2
U27
820pF
10%
6V
1k⍀ 1%
1.69k⍀
1%
0.1F
–42.5
–47.5
16V
10%
X7R
0.1F
50V
5%
10k
100k
FREQUENCY – Hz
1M
10M
NPO
1k⍀ 1%
Figure 39. Frequency Response of Sallen-Key Filter
820pF
10%
6
5
7
U27
4
AD8022
1.91k⍀
1%
2.43k⍀
1%
680pF
5% NPO
Figure 38. Differential Input Sallen-Key Filter Using
AD8022 on Single Supply, 12 V
REV. 0
–13–
ADI [ ADI ]
