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AD8022AR-EVAL 参数 Datasheet PDF下载

AD8022AR-EVAL图片预览
型号: AD8022AR-EVAL
PDF下载: 下载PDF文件 查看货源
内容描述: 双高速低噪声运算放大器 [Dual High-Speed Low-Noise Op Amps]
分类和应用: 运算放大器
文件页数/大小: 16 页 / 234 K
品牌: ADI [ ADI ]
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AD8022  
0
–10  
–20  
–30  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
0
–10  
–20  
–30  
–40  
–50  
–60  
–70  
–80  
–90  
–PSRR  
–PSRR  
+PSRR  
+PSRR  
–100  
10k  
10k  
100k  
1M  
FREQUENCY – Hz  
10M  
100M  
100k  
1M  
FREQUENCY – Hz  
10M  
100M  
Figure 34. Power Supply Rejection vs. Frequency,  
Figure 33. Power Supply Rejection vs. Frequency,  
VS = ±2.5 V  
VS = ±12 V  
THEORY OF OPERATION  
APPLICATIONS  
The AD8022 is a voltage-feedback op amp designed especially  
for ADSL or other applications requiring very low voltage and  
current noise along with low-supply current, low distortion, and  
ease of use.  
The low-noise AD8022 dual xDSL receiver amplifier is specifi-  
cally designed for the dual differential receiver amplifier function  
within xDSL transceiver hybrids as well as other low-noise  
amplifier applications. The AD8022 may be used in receiving  
modulated signals including Discrete Multitone (DMT) on either  
end of the subscriber loop. Communication systems designers  
can be challenged when designing an xDSL modem transceiver  
hybrid capable of receiving the smallest signals embedded in noise  
that inherently exists on twisted pair phone lines. Noise sources  
include Near End Cross Talk (NEXT), Far End Cross Talk  
(FEXT), background and impulse noise, all of which are fed, to  
some degree, into the receiver front end. Based on a Bellcore  
noise survey, the background noise level for typical twisted pair  
telephone loop is said to be –140 dBm/Hz or 31 nV/Hz. It  
is therefore important to minimize the noise added by the receiver  
amplifiers in order to preserve as much Signal-to-Noise Ratio  
(SNR) as is possible. With careful transceiver hybrid design  
using the AD8022 dual low-noise receiver amplifier, maintaining  
power density levels lower than –140 dBm/Hz in ADSL modems is  
easily achieved.  
The AD8022 is fabricated on Analog Devices’ proprietary eXtra-  
Fast Complementary Bipolar (XFCB) process, which enables  
the construction of PNP and NPN transistors with similar fTs in  
the 4 GHz region. The process is dielectrically isolated to eliminate  
the parasitic and latch-up problems caused by junction isolation.  
These features enable the construction of high-frequency, low-  
distortion amplifiers with low-supply currents.  
+V  
S
15⍀  
15⍀  
+IN  
–IN  
OUTPUT  
7.5pF  
DMT Modulation and Multitone Power Ratio (MTPR)  
ADSL systems rely on Discrete Multitone (or DMT) modulation  
to carry digital data over phone lines. DMT modulation appears  
in the frequency domain as power contained in several individual  
frequency subbands, sometimes referred to as tones or bins,  
each of which is uniformly separated in frequency. (See Figures  
21, 22, 24, and 25 for MTPR results while the AD8022 receives  
DMT driving 800 mV rms across 500 differential load). A  
uniquely encoded, Quadrature Amplitude Modulation (QAM)  
signal occurs at the center frequency of each subband or tone.  
Difficulties will exist when decoding these subbands if a QAM  
signal from one subband is corrupted by the QAM signal(s) from  
other subbands, regardless of whether the corruption comes from  
an adjacent subband or harmonics of other subbands. Conven-  
tional methods of expressing the output signal integrity of line  
receivers such as spurious free dynamic range (SFDR), single  
tone harmonic distortion or THD, two-tone Intermodulation  
Distortion (IMD) and third-order intercept (IP3) become  
significantly less meaningful when amplifiers are required to  
600A  
–V  
S
OFFSET NULL  
Figure 35. Simplified Schematic  
As shown in Figure 35, the AD8022 input stage consists of an  
NPN differential pair in which each transistor operates a 300 µA  
collector current. This gives the input devices a high transconduc-  
tance and hence gives the AD8022 low-input noise of 2.5 nV/Hz  
@ 100 kHz. The input stage drives a folded cascode that consists  
of a pair of PNP transistors. These PNP’s then drive a current  
mirror that provides a differential-input to single-ended-out-  
put conversion. The output stage provides a high-current gain  
of 10,000, so that the AD8022 can maintain a high-dc open-  
loop gain, even into low-load impedances.  
REV. 0  
–10–