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AD7886JP 参数 Datasheet PDF下载

AD7886JP图片预览
型号: AD7886JP
PDF下载: 下载PDF文件 查看货源
内容描述: LC2MOS 12位, 750千赫/ 1 MHz时,采样ADC [LC2MOS 12-Bit, 750 kHz/1 MHz, Sampling ADC]
分类和应用: 转换器信息通信管理
文件页数/大小: 16 页 / 402 K
品牌: AD [ ANALOG DEVICES ]
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= +5 V 5%,
= –5 V
O V, V
AD7886–SPECIFICATIONS
(V otherwise noted. VSpecifications5%, A6ND = DGND =version.) = –3.5 V, connected
as shown in Figure 2. All Specifications T to T unless
apply for 750 kHz
DD
SS
REF
MIN
MAX
Parameter
DYNAMIC PERFORMANCE
2
Signal-to-Noise Ratio
3
(SNR)
Total Harmonic Distortion (THD)
Peak Harmonic or Spurious Noise
Intermodulation Distortion (IMD)
Second Order Terms
Third Order Terms
ACCURACY
Resolution
Integral Linearity T
MIN
to T
MAX
Minimum Resolution for Which
No Missing Codes Are Guaranteed
Unipolar Offset Error @ +25°C
T
MIN
to T
MAX
Bipolar Offset Error @ +25°C
T
MIN
to T
MAX
Unipolar Gain Error @ +25°C
T
MIN
to T
MAX
Bipolar Gain Error @ +25°C
T
MIN
to T
MAX
ANALOG INPUT
Unipolar Input Current
Bipolar Input Current
REFERENCE INPUT
V
REF
Input Reference Current
R1, Resistance
R2, Resistance
R2/R1 Ratio
J Version
1
K, B Versions
1
T Version
1
Units
Test Conditions/Comments
65
–75
–77
–80
–80
67
–75
–77
–80
–80
65
–75
–77
–80
–80
dB min
dB typ
dB typ
dB typ
dB typ
VIN = 100 kHz Sine Wave, f
SAMPLE
= 750 kHz
VIN = 100 kHz Sine Wave, f
SAMPLE
= 750 kHz
VIN = 100 kHz Sine Wave, f
SAMPLE
= 750 kHz
f
a
= 96 kHz, f
b
= 103 kHz, f
SAMPLE
= 750 kHz
12
12
±
2
12
±
5
±
5
±
5
±
5
±
5
±
5
±
5
+5
12
±
2
12
±
5
±
5
±
5
±
5
±
5
±
5
±
5
±
5
1.5
±
0.75
–3.5
–10
9
6.3
0.7
Bits
LSB max
Bits
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
12
±
5
±
5
±
5
±
5
±
5
±
5
±
5
±
5
1.5
±
0.75
–3.5
–10
9
6.3
0.7
Input Range: 0 V to 5 V or 0 V to 10 V
Input Range:
±
5 V
Input Range: 0 V to 5 V or 0 V to 10 V
Input Range:
±
5 V
1.5
±
0.75
–3.5
–10
9
6.3
0.7
mA max
mA max
Input Ranges: 0 V to 5 V or 0 V to 10 V
Input Range:
±
5 V
±
2% For Specified Performance
±
25%
±
25%
±
0.1%
Volts
mA max
kΩ nom
kΩ nom
nom
POWER SUPPLY REJECTION
V
DD
Only, (FS Change)
V
SS
Only, (FS Change)
LOGIC INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
IN
Input Capacitance, C
IN4
LOGIC OUTPUTS
DB11–DB0,
BUSY
Output High Voltage, V
OH
Output Low Voltage, V
OL
DB11–DB0
Floating-State Leakage Current
Floating-State Output Capacitance
4
POWER REQUIREMENTS
V
DD
V
SS
I
DD
I
SS
Power Dissipation
0.5
0.5
0.5
0.5
0.5
0.5
LSB typ
LSB typ
V
SS
= –5 V, V
DD
= +4.75 V to +5.25 V
V
DD
= +5 V, V
SS
= –4.75 V to –5.25 V
V
DD
= 5 V
±
5%
V
DD
= 5 V
±
5%
V
IN
= 0 V to V
DD
2.4
0.8
±
10
10
2.4
0.8
±
10
10
2.4
0.8
±
10
10
V min
V max
µA
max
pF max
4
0.4
±
10
15
4
0.4
±
10
15
4
0.4
±
10
15
V min
V max
pA max
pF max
I
SOURCE
= 200
µA
I
SINK
= 1.6 mA
+5
–5
35
–35
250
350
+5
–5
35
–35
250
350
+5
–5
35
–35
250
350
V nom
V nom
mA max
mA max
mW typ
mW max
±
5% for Specified Performance
±
5% for Specified Performance
Typically 25 mA,
CONVST
=
CS
=
RD
= V
DD
Typically 25 mA,
CONVST
=
CS
=
RD
= V
DD
CONVST
=
CS
=
RD
= V
DD
NOTES
I
Temperature ranges are as follows: J, K Versions: 0°C to +70°C; B Version: –40°C to +85°C; T Version: –55°C to + 125°C.
2
Applies to all three input ranges, V
IN
= 0 to FS, pk-to-pk V.
3
SNR calculation includes distortion and noise components.
4
Sample tested @ +25°C to ensure compliance.
Specifications subject to change without notice.
–2–
REV. B