AD7705/AD7706
Table II. Peak-to-Peak Resolution vs. Gain and Output Update Rate @ 5 V
Typical Peak-to-Peak Resolution Bits
Filter First
Notch and O/P –3 dB
Gain of
1
Gain of
2
Gain of
4
Gain of
8
Gain of
16
Gain of
32
Gain of
64
Gain of
128
Data Rate
Frequency
MCLK IN = 2.4576 MHz
50 Hz
60 Hz
250 Hz
500 Hz
13.1 Hz
15.72 Hz
65.5 Hz
131 Hz
16
16
13
10
16
16
13
10
16
16
13
10
16
16
13
10
16
15
13
10
16
14
13
10
15
14
12
10
14
13
12
10
MCLK IN = 1 MHz
20 Hz
25 Hz
100 Hz
200 Hz
5.24 Hz
16
16
13
10
16
16
13
10
16
16
13
10
16
16
13
10
16
15
13
10
16
14
13
10
15
14
12
10
14
13
12
10
6.55 Hz
26.2 Hz
52.4 Hz
OUTPUT NOISE (3 V OPERATION)
Table III shows the AD7705/AD7706 output rms noise for the selectable notch and –3 dB frequencies for the part, as selected by
FS0 and FS1 of the Clock Register. The numbers given are for the bipolar input ranges with a VREF of +1.225 V and a VDD = 3 V.
These numbers are typical and are generated at an analog input voltage of 0 V with the part used in either buffered or unbuffered
mode. Table II meanwhile shows the output peak-to-peak noise for the selectable notch and –3 dB frequencies for the part. It is im-
portant to note that these numbers represent the resolution for which there will be no code flicker. They are not calculated based on rms noise but
on peak-to-peak noise. The numbers given are for bipolar input ranges with a VREF of +1.225 V and for either buffered or unbuffered
mode. These numbers are typical and are rounded to the nearest LSB. The numbers apply for the CLK DIV bit of the Clock Regis-
ter set to 0.
Table III. Output RMS Noise vs. Gain and Output Update Rate @ 3 V
Filter First
Typical Output RMS Noise in V
Notch and O/P –3 dB
Gain of
1
Gain of
2
Gain of
4
Gain of
8
Gain of
16
Gain of
32
Gain of
64
Gain of
128
Data Rate
Frequency
MCLK IN = 2.4576 MHz
50 Hz
60 Hz
250 Hz
500 Hz
13.1 Hz
15.72 Hz
65.5 Hz
131 Hz
3.8
5.1
50
2.4
2.9
25
1.5
1.7
14
1.3
1.5
9.9
41
1.1
1.2
5.1
22
1.0
1.0
2.6
9.7
0.9
0.9
2.3
5.1
0.9
0.9
2.0
3.3
270
135
65
MCLK IN = 1 MHz
20 Hz
25 Hz
100 Hz
200 Hz
5.24 Hz
3.8
5.1
50
2.4
2.9
25
1.5
1.7
14
1.3
1.5
9.9
41
1.1
1.2
5.1
22
1.0
1.0
2.6
9.7
0.9
0.9
2.3
5.1
0.9
0.9
2.0
3.3
6.55 Hz
26.2 Hz
52.4 Hz
270
135
65
Table IV. Peak-to-Peak Resolution vs. Gain and Output Update Rate @ 3 V
Typical Peak-to-Peak Resolution in Bits
Filter First
Notch and O/P –3 dB
Data Rate Frequency
Gain of
1
Gain of
2
Gain of
4
Gain of
8
Gain of
16
Gain of
32
Gain of
64
Gain of
128
M
50 Hz
60 Hz
250 Hz
500 Hz
CLK IN = 2.4576 MHz
13.1 Hz
15.72 Hz
65.5 Hz
131 Hz
16
16
13
10
16
15
15
13
10
15
14
13
10
14
14
12
10
13
13
12
10
13
13
11
10
12
12
11
10
16
13
10
MCLK IN = 1 MHz
20 Hz
25 Hz
100 Hz
200 Hz
5.24 Hz
16
16
13
10
16
16
13
10
15
15
13
10
15
14
13
10
14
14
12
10
13
13
12
10
13
13
11
10
12
12
11
10
6.55 Hz
26.2 Hz
52.4 Hz
–8–
REV. A
ADI [ ADI ]
