AD7705/AD7706
CONFIGURING THE AD7705/AD7706
DRDY
pin. In addition,
Figure 21 shows a series of words that should be written to the
registers for the following operating conditions: Gain 1, no
filter sync, bipolar mode, buffer off, clock of 4.9512 MHz, and
output rate of 50 Hz.
The flowchart also shows two read options—one polls the
DRDY
pin, and the other interrogates the
The AD7705/AD7706 contain six on-chip registers that the user
can access via the serial interface. Communication with any of
these registers is initiated by first writing to the communication
register. Figure 21 outlines a flowchart of the sequence used to
configure registers after a power-up or reset on the AD7705;
similar procedures apply to the AD7706.
START
POWER-ON/RESET FOR AD7705
CONFIGURE & INITIALIZE μC/μP SERIAL PORT
WRITE TO COMMUNICATIONS REGISTER SELECTING
CHANNEL & SETTING UP NEXT OPERATION TO BE A
WRITE TO THE CLOCK REGISTER (20 HEX)
WRITE TO CLOCK REGISTER SETTING THE CLOCK
BITS IN ACCORDANCE WITH THE APPLIED MASTER
CLOCK SIGNAL AND SELECT UPDATE RATE FOR
SELECTED CHANNEL (0C HEX)
WRITE TO COMMUNICATIONS REGISTER SELECTING
CHANNEL & SETTING UP NEXT OPERATION TO BE A
WRITE TO THE SETUP REGISTER (10 HEX)
WRITE TO SETUP REGISTER CLEARING F SYNC,
SETTING UP GAIN, OPERATING CONDITIONS &
INITIATING A SELF-CALIBRATION ON SELECTED
CHANNEL (40 HEX)
POLL DRDY PIN
WRITE TO COMMUNICATIONS REGISTER SETTING UP NEXT
OPERATION TO BE A READ FROM THE COMMUNICATIONS
REGISTER (08 HEX)
NO
DRDY
LOW?
YES
READ FROM COMMUNICATIONS REGISTER
WRITE TO COMMUNICATIONS REGISTER SETTING UP
NEXT OPERATION TO BE A READ FROM THE DATA
REGISTER (38 HEX)
POLL DRDY BIT OF COMMUNICATIONS REGISTER
READ FROM DATA REGISTER
NO
DRDY
LOW?
YES
WRITE TO COMMUNICATIONS REGISTER SETTING UP
NEXT OPERATION TO BE A READ FROM THE DATA
REGISTER (38 HEX)
READ FROM DATA REGISTER
Figure 21. Flowchart for Setting Up and Reading from the AD7705
Rev. C | Page 33 of 44
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