AD7705/AD7706
1.05 × V
/GAIN
REF
Power-Up and Calibration
UPPER LIMIT ON
AD7705 INPUT VOLTAGE
Upon power-up, the AD7705/AD7706 internally reset, setting
the contents of the internal registers to a known state. Default
values are loaded to all registers after a power-on or reset. The
default values contain nominal calibration coefficients for the
calibration registers. However, to ensure correct calibration for the
devices, a calibration routine should be performed after power-up.
AD7705/AD7706
INPUT RANGE
GAIN CALIBRATIONS EXPAND
OR CONTRACT THE
(0.8 × V
/GAIN TO
/GAIN)
REF
2.1 × V
REF
AD7705/AD7706 INPUT RANGE
NOMINAL ZERO
SCALE POINT
–0V DIFFERENTIAL
OFFSET CALIBRATIONS MOVE
INPUT RANGE UP OR DOWN
LOWER LIMIT ON
AD7705/AD7706 INPUT VOLTAGE
The power dissipation and temperature drift of the AD7705/
AD7706 are low, and no warm-up time is required before the
initial calibration is performed. However, if an external reference
is used, it must be stabilized before calibration is initiated.
Similarly, if the clock source for the part is generated from a
crystal or resonator across the MCLK pins, the start-up time
for the oscillator circuit should elapse before a calibration is
initiated on the parts (see Figure 11).
–1.05 × V
/GAIN
REF
Figure 16. Span and Offset Limits
If the part is used in bipolar mode with a required span of
0.4 × VREF/gain, the offset range that the system calibration can
handle is –0.65 × VREF/gain to +0.65 × VREF/gain. If
the part is used in bipolar mode with a required span of
VREF/gain, the offset range that the system calibration can
handle is –0.05 × VREF/gain to +0.05 × VREF/gain. Similarly, if the
part is used in bipolar mode and required to remove an offset of
0.2 × VREF/gain, the maximum span range that the system
calibration can handle is 0.85 × VREF/gain.
Rev. C | Page 27 of 44
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