AD7628
MICROPROCESSOR INTERFACE
Figure 11. AD7628 Dual DAC to 6800 CPU Interface
PROGRAMMABLE WINDOW COMPARATOR
Figure 12. AD7628 Dual DAC to 8085 CPU Interface
In the circuit of Figure 13, the AD7628 is used to implement a
programmable window comparator. DACs A and B are loaded
with the required upper and lower voltage limits for the test,
respectively. If the test input is not within the programmed lim-
its, the pass/fail output will indicate a fail (logic zero).
Figure 13. Digitally Programmable Window Comparator
(Upper and Lower Limit Detector)
PROGRAMMABLE STATE VARIABLE FILTER
CIRCUIT EQUATIONS
C
1
= C
2
, R
1
= R
2
, R
4
= R
5
f
C
=
2
π
R C
1 1
Q=
R
3
.
R
F
R
4
R
FBB1
R
F
R
S
1
A
O
= –
NOTE
DAC equivalent resistance equals
256
×
DAC Ladder resistance
DAC Digital Code
(
)
Figure 14. Digitally Controlled State Variable Filter
In this state, variable or universal filter configuration (Figure
14) for DACs A1 and B1 control the gain and Q of the filter
characteristic, while DACs A2 and B2 control the cutoff fre-
quency, f
C
. DACs A2 and B2 must track accurately for the simple
expression for f
C
to hold. This is readily accomplished by the
AD7628. Op amps are 2
×
AD644. C3 compensates for the
effects of op amp gain-bandwidth limitations.
REV. A
The filter provides low pass, high pass and band pass outputs
and is ideally suited for applications where microprocessor con-
trol of filter parameters is required, e.g., equalizer, tone con-
trols, etc.
Programmable range for component values shown is f
C
= 0 kHz
to 15 kHz and Q = 0.3 to 4.5.
–7–
AD [ ANALOG DEVICES ]
