AD7628
Figure 4. Dual DAC Unipolar Binary Operation (2 Quadrant Multiplication). See Table I.
Figure 5. Dual DAC Bipolar Operation (4 Quadrant Multiplication). See Table II.
Table I. Unipolar Binary Code Table
DAC Latch Contents
MSB
LSB
11111111
10000001
10000000
01111111
00000001
00000000
NOTE: 1 LSB = (2
–8
)(V
IN
) =
1
V
IN
256
Table II. Bipolar (Offset Binary) Code Table
DAC Latch Contents
MSB
LSB
11111111
10000001
10000000
01111111
00000001
00000000
1
V
IN
128
Analog Output
(DAC A or DAC B)
255
–V
IN
256
129
–V
IN
256
128
V
IN
–V
IN
=
– 2
256
127
–V
IN
256
1
–V
IN
256
0
–V
IN
=
0
256
Analog Output
(DAC A or DAC B)
127
+V
IN
128
1
+V
IN
128
0
1
–V
IN
128
127
–V
IN
128
–V
IN
128
128
( )
Trim
Resistor
R1; R3
R2; R4
NOTE: 1 LSB = (2
–7
)(V
IN
) =
(
)
Table III. Recommended Trim Resistor Values
K/B/T
500
150
–5–
REV. A
AD [ ANALOG DEVICES ]
