AD7606/AD7606-6/AD7606-4
Analog Input Antialiasing Filter
hold (that is, the delay time between the external CONVST x
signal and the track-and-hold actually going into hold) is well
matched, by design, across all eight track-and-holds on one
device and from device to device. This matching allows more
than one AD7606/AD7606-6/AD7606-4 device to be sampled
simultaneously in a system.
An analog antialiasing filter (a second-order Butterworth) is also
provided on the AD7606/AD7606-6/AD7606-4. Figure 37 and
Figure 38 show the frequency and phase response, respectively,
of the analog antialiasing filter. In the 5 V range, the −3 dB
frequency is typically 15 kHz. In the 10 V range, the −3 dB
frequency is typically 23 kHz.
The end of the conversion process across all eight channels is
indicated by the falling edge of BUSY; and it is at this point that the
track-and-holds return to track mode, and the acquisition time
for the next set of conversions begins.
5
0
±10V RANGE
AV , V
CC DRIVE
= 5V
–5
–10
–15
–20
–25
–30
–35
–40
F
T
= 200kSPS
SAMPLE
= 25°C
±5V RANGE
The conversion clock for the part is internally generated, and
the conversion time for all channels is 4 μs on the AD7606,
3 μs on the AD7606-6, and 2 μs on the AD7606-4. On the AD7606,
the BUSY signal returns low after all eight conversions to indicate
the end of the conversion process. On the falling edge of BUSY,
the track-and-hold amplifiers return to track mode. New data
can be read from the output register via the parallel, parallel
byte, or serial interface after BUSY goes low; or, alternatively,
data from the previous conversion can be read while BUSY is
high. Reading data from the AD7606/AD7606-6/AD7606-4
while a conversion is in progress has little affect on performance
and allows a faster throughput to be achieved. In parallel mode
at VDRIVE > 3.3 V, the SNR is reduced by ~1.5 dB when reading
during a conversion.
A
±10V RANGE 0.1dB
3dB
–40 10,303 24,365Hz
+25 9619
+85 9326
23,389Hz
22,607Hz
±5V RANGE
0.1dB
–40 5225
+25 5225
+85 4932
3dB
16,162Hz
15,478Hz
14,990Hz
100
1k
10k
100k
INPUT FREQUENCY (Hz)
Figure 37. Analog Antialiasing Filter Frequency Response
18
16
14
12
10
8
ADC TRANSFER FUNCTION
±5V RANGE
±10V RANGE
The output coding of the AD7606/AD7606-6/AD7606-4 is
twos complement. The designed code transitions occur midway
between successive integer LSB values, that is, 1/2 LSB and 3/2 LSB.
The LSB size is FSR/65,536 for the AD7606. The ideal transfer
characteristic for the AD7606/AD7606-6/AD7606-4 is shown
in Figure 39.
6
4
2
0
VIN
10V
VIN
5V
REF
2.5V
REF
2.5V
±10V CODE =
× 32,768 ×
–2
–4
–6
–8
AV , V
= 5V
= 200kSPS
±5V CODE =
× 32,768 ×
CC DRIVE
F
T
SAMPLE
= 25°C
011...111
011...110
A
10
1k
10k
100k
+FS – (–FS)
216
000...001
000...000
111...111
LSB =
INPUT FREQUENCY (Hz)
Figure 38. Analog Antialias Filter Phase Response
Track-and-Hold Amplifiers
100...010
100...001
100...000
The track-and-hold amplifiers on the AD7606/AD7606-6/
AD7606-4 allow the ADC to accurately acquire an input sine wave
of full-scale amplitude to 16-bit resolution. The track-and-hold
amplifiers sample their respective inputs simultaneously on the
rising edge of CONVST x. The aperture time for the track-and-
–FS + 1/2LSB 0V – 1/2LSB +FS – 3/2LSB
ANALOG INPUT
+FS
±10V RANGE +10V
±5V RANGE +5V
MIDSCALE –FS
LSB
305µV
152µV
0V
0V
–10V
–5V
Figure 39. AD7606/AD7606-6/AD7606-4 Transfer Characteristics
The LSB size is dependent on the analog input range selected.
Rev. 0 | Page 23 of 36
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