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AD7537JN 参数 Datasheet PDF下载

AD7537JN图片预览
型号: AD7537JN
PDF下载: 下载PDF文件 查看货源
内容描述: LC2MOS ( 8 + 4 )加载双通道12位DAC [LC2MOS (8+4) Loading Dual 12-Bit DAC]
分类和应用: 转换器数模转换器光电二极管信息通信管理
文件页数/大小: 8 页 / 209 K
品牌: AD [ ANALOG DEVICES ]
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AD7537–SPECIFICATIONS
Parameter
ACCURACY
Resolution
Relative Accuracy
Differential Nonlinearity
Gain Error
Gain Temperature Coefficient
2
;
∆Gain/∆Temperature
Output Leakage Current
I
OUTA
+25°C
T
MIN
to T
MAX
I
OUTB
+25°C
T
MIN
to T
MAX
REFERENCE INPUT
Input Resistance
V
REFA
, V
REFB
Input Resistance Match
DIGITAL INPUTS
V
IH
(lnput High Voltage)
V
IIL
(Input Low Voltage)
I
IN
(Input Current)
+25°C
T
MIN
to T
MAX
C
IN
(lnput Capacitance)
2
POWER SUPPLY
3
V
DD
I
DD
J, A
Versions
12
±
1
±
1
±
6
K, B
Versions
12
±
1/2
±
1
±
3
(V
DD
= +12 V to +15 V, 10%, V
REFA
= V
REFB
= 10 V; I
OUTA
= AGND = 0 V,
I
OUTB
= AGNDB = 0 V. All specifications T
MIN
to T
MAX
unless otherwise noted.)
L, C
Versions
12
±
1/2
±
1
±
1
S
Version
12
±
1
±
1
±
6
T
Version
12
±
1/2
±
1
±
3
U
Version
12
±
1/2
±
1
±
2
Units
Bits
LSB max
LSB max
LSB max
Test Conditions/Comments
All grades guaranteed mono-
tonic over temperature.
Measured using R
FBA
, R
FBB
.
Both DAC registers loaded
with all 1s.
±
5
10
150
10
150
9
20
±
3
2.4
0.8
±
1
±
10
10
10.8/16.5
2
±
5
10
150
10
150
9
20
±
3
2.4
0.8
±
1
±
10
10
10.8/16.5
2
±
5
10
150
10
150
9
20
±
1
2.4
0.8
±
1
±
10
10
10.8/16.5
2
±
5
10
250
10
250
9
20
±
3
2.4
0.8
±
1
±
10
10
10.8/16.5
2
±
5
10
250
10
250
9
20
±
3
2.4
0.8
±
1
±
10
10
10.8/16.5
2
±
5
10
250
10
250
9
20
±
1
2.4
0.8
±
1
±
10
10
10.8/16.5
2
ppm/°C max Typical value is 1 ppm/°C
nA max
nA max
nA max
nA max
kΩ min
kΩ max
% max
V min
V max
µA
max
µA
max
pF max
V min/V max
mA max
V
IN
= V
DD
DAC A Register loaded
with all 0s
DAC B Register loaded
with all 0s
Typical Input Resistance = 14 kΩ
Typically
±
0.5%
AC PERFORMANCE CHARACTERISTICS
These characteristics are included for Design Guidance only and are not subject to test.
(V
DD
= +12 V to +15 V; V
REFA
= V
REFB
= +10 V; I
OUTA
= AGNDA = 0 V, I
OUTB
= AGNDB = 0 V. Output Amplifiers are AD644 except where noted.)
Parameter
Output Current Settling Time
T
A
= +25 C
1.5
T
A
= T
MIN
, T
MAX
Units
µs
max
Test Conditions/Comments
To 0.01% of full-scale range. I
OUT
load = 100
Ω,
C
EXT
= 13 pF.
DAC output measured from falling edge of
WR.
Typical Value of Settling Time is 0.8
µs.
Measured with V
REFA
= V
REFB
= 0 V. I
OUTA
, I
OUTB
load = 100
Ω,
C
EXT
= 13 pF. DAC registers alternately loaded with all 0s and all 1s.
V
REFA
, V
REFB
= 20 V p-p 10 kHz sine wave.
DAC registers loaded with all 0s.
Digital-to-Analog Glitch lmpulse
AC Feedthrough
4
V
REFA
to I
OUTA
V
REFB
to I
OUTB
Power Supply Rejection
∆Gain/∆V
DD
Output Capacitance
C
OUTA
C
OUTB
C
OUTA
C
OUTB
Channel-to-Channel Isolation
V
REFA
to I
OUTB
V
REFB
to I
OUTA
Digital Crosstalk
Output Noise Voltage Density
(10 Hz–100 kHz)
Total Harmonic Distortion
NOTES
1
Temperature range as follows:
7
nV-s typ
–70
–70
±
0.01
70
70
140
140
–84
–84
7
25
–82
–65
–65
±
0.02
70
70
140
140
dB max
dB max
% per % max
∆V
DD
= V
DD
max – V
DD
min
pF max
pF max
pF max
pF max
dB typ
dB typ
nV-s typ
nV/√Hz typ
dB typ
2
3
DAC A, DAC B loaded with all 0s
DAC A, DAC B loaded with all 1s
V
REFA
= 20 V p-p 10 kHz sine wave, V
REFB
= 0 V.
Both DACs loaded with all 1s.
V
REFB
= 20 V p-p 10 kHz sine wave, V
REFA
= 0 V.
Both DACs loaded with all 1s.
Measured for a Code Transition of all 0s to all 1s.
I
OUTA
, I
OUTB
load = 100
Ω,
C
EXT
= 13 pF.
Measured between R
FBA
and I
OUTA
or R
FBB
and I
OUTB.
Frequency of measurement is 10 Hz–100 kHz.
V
IN
= 6 V rms, 1 kHz. Both DACs loaded with all 1s.
J, K, L Versions: –40°C to +85°C;
A, B, C Versions: –40°C to +85°C;
S, T, U Versions: –55°C to +125°C
Specifications subject to change without notice.
Sample tested at +25°C to ensure compliance.
Functional at V
DD
= 5 V, with degraded specifications.
4
Pin 12 (DGND) on ceramic DIPs is connected to lid.
–2–
REV. 0