AD711
current-to-voltage converters. The use of a guarding technique
such as that shown in Figure 7, in printed circuit board layout
and construction is critical to minimize leakage currents. The
guard ring is connected to a low impedance potential at the
same level as the inputs. High impedance signal lines should
not be extended for any unnecessary length on the printed
circuit board.
4
5
3
2
6
3
2
1
6
7
8
4
5
Figure 5a. Settling Characteristics 0 to +10 V Step
Upper Trace: Output of AD711 Under Test (5 V/Div)
Lower Trace: Amplified Error Voltage (0.01%/Div)
1
8
7
Figure 7. Board Layout for Guarding Inputs
D/A CONVERTER APPLICATIONS
The AD711 is an excellent output amplifier for CMOS DACs.
It can be used to perform both 2-quadrant and 4-quadrant
operation. The output impedance of a DAC using an inverted
R-2R ladder approaches R for codes containing many 1s, 3R
for codes containing a single 1, and for codes containing all
zero, the output impedance is infinite.
For example, the output resistance of the AD7545 will modu-
late between 11 kW and 33 kW. Therefore, with the DAC’s
internal feedback resistance of 11 kW, the noise gain will vary
from 2 to 4/3. This changing noise gain modulates the effect of
the input offset voltage of the amplifier, resulting in nonlinear
DAC amplifier performance.
The AD711K with guaranteed 500
mV
offset voltage minimizes
this effect to achieve 12-bit performance.
Figure 5b. Settling Characteristics 0 to –10 V Step
Upper Trace: Output of AD711 Under Test (5 V/Div)
Lower Trace: Amplified Error Voltage (0.01%/Div)
GUARDING
The low input bias current (15 pA) and low noise characteristics
of the AD711 BiFET op amp make it suitable for electrometer
applications such as photo diode preamplifiers and picoampere
5pF
HP2835
AD3554
205
V
ERROR
5
TEXTRONIX 7A26
OSCILLOSCOPE
PREAMP
INPUT SELECTION
HP2835
0.47 F
4.99k
200k
DATA
DYNAMICS
5109
(OR
EQUIVALENT
FLAT TOP
PULSE
GENERATOR)
V
IN
10k
10k
AD711
5k
0.1 F
0.1 F
–15V
+15V
10pF
5-18pF
1.1k
4.99k
–15V
+15V
10k
0.2-0.0pF
V
OUT
0.47 F
1M
20pF
Figure 6. Settling Time Test Circuit
REV. E
–9–
AD [ ANALOG DEVICES ]
