AD711
OPTIMIZING SETTLING TIME
Most bipolar high-speed D/A converters have current outputs;
therefore, for most applications, an external op amp is required
for current-to-voltage conversion. The settling time of the
converter/op amp combination depends on the settling time of
the DAC and output amplifier. A good approximation is:
t
S
Total
=
(t
S
DAC
)
2
+
(t
S
AMP
)
2
In addition to a significant improvement in settling time, the
low offset voltage, low offset voltage drift, and high open-loop
gain of the AD711 family assures 12-bit accuracy over the full
operating temperature range.
The excellent high-speed performance of the AD711 is shown
in the oscilloscope photos of Figure 2. Measurements were taken
using a low input capacitance amplifier connected directly to the
summing junction of the AD711 – both photos show the worst
case situation: a full-scale input transition. The DAC’s 4 kW
[10 kW 8 kW = 4.4 kW] output impedance together with a 10 kW
feedback resistor produce an op amp noise gain of 3.25. The
current output from the DAC produces a 10 V step at the op
amp output (0 to –10 V Figure 2a, –10 V to 0 V Figure 2b.)
Therefore, with an ideal op amp, settling to
±
1/2 LSB (± 0.01%)
requires that 375
mV
or less appears at the summing junction.
This means that the error between the input and output (that
voltage which appears at the AD711 summing junction) must
be less than 375
mV.
As shown in Figure 2, the total settling time
for the AD711/AD565 combination is 1.2 microseconds.
(1)
The settling time of an op amp DAC buffer will vary with the
noise gain of the circuit, the DAC output capacitance, and with
the amount of external compensation capacitance across the
DAC output scaling resistor.
Settling time for a bipolar DAC is typically 100 ns to 500 ns.
Previously, conventional op amps have required much longer
settling times than have typical state-of-the-art DACs; therefore,
the amplifier settling time has been the major limitation to a
high-speed voltage-output D-to-A function. The introduction
of the AD711/712 family of op amps with their 1
ms
(to
±
0.01%
of final value) settling time now permits the full high-speed
capabilities of most modern DACs to be realized.
0.1 F
BIPOLAR
OFFSET ADJUST
REF
OUT
R2
GAIN 100
ADJUST
V
CC
R1
100
BIPOLAR
OFF
20V
SPAN
5k
10V
SPAN
5k
10pF
+15V
0.1 F
10V
AD565A
0.5mA
I
REF
9.95k
19.95k
REF
IN
REF
GND
20k
DAC
I
OUT
= 4
I
REF
CODE
DAC
OUT
AD711K
0.1 F
–15V
OUTPUT
–10V TO +10V
I
O
5k
0.1 F
–V
EE
POWER
GND
MSB
LSB
Figure 1.
±
10 V Voltage Output Bipolar DAC
a. (Full-Scale Negative Transition)
b. (Full-Scale Positive Transition)
Figure 2. Settling Characteristics for AD711 with AD565A
REV. E
–7–
AD [ ANALOG DEVICES ]
