AD652
+5V
4kΩ
MPX INPUT
1N4148
+V
+V
+V
S
S
S
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
16
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VOLTS
OUT
VOLTS
OUT
VOLTS
OUT
15
14
13
12
11
10
9
V
V
V
2
3
4
AD652
AD652
AD652
SYNCHRONOUS
VOLTAGE-TO-
FREQUENCY
CONVERTER
SYNCHRONOUS
VOLTAGE-TO-
FREQUENCY
CONVERTER
SYNCHRONOUS
VOLTAGE-TO-
FREQUENCY
CONVERTER
0.02µF
0.02µF
0.02µF
φ
2
φ
3
φ4
–V
–V
–V
S
S
S
φ2, φ3, φ4 ARE PINS 15, 7, 6 OF TIM9904A FROM DEMUX FIGURE 30
Figure 31. Demultiplexer Frequency-to-Voltage Conversion
+5V
FREQUENCY
OUTPUT
CK
Q
D
Q
CK
Q
D
'74
'74
1.5kΩ
1.2kΩ
DRIVER
OSC
1
2
3
4
8
7
6
5
5
6
4
2N6659
2N6659
3
2
1
100Ω
100Ω
200pF
10kΩ
500Ω
7
MYLAR
0.01µF
6.8kΩ
1.65kΩ
1.65kΩ
6N137
V
8
+5V
OPTO-
AD654
ISOLATOR
AD589
1.2V
+5V
24 TURNS
T50- MICROMETALS
TRANSFORMER
PICO 31080
10µH
3
1
2
ISOLATION BARRIER
7
6 5
4
1N4148
+15V
AD652
SYNCHRONOUS
VOLTAGE-TO-
FREQUENCY
CONVERTER
47µF
47µF
5V
1
2
3
4
5
6
7
8
16
REFERENCE
15
14
13
12
11
10
9
–15V
REG
+15V
7915
7815
REG
47µF
47µF
0.02µF
ONE
–15V
+15V
3kΩ
SHOT
LO
V
IN
20kΩ
HI
1mA
Q
CK
1kΩ
D
AND
"D"
FLOP
1nF
Q
10kΩ
1nF
–15V
Figure 32. Isolated Synchronous VFC
Analog Signal Reconstruction
ϕ
driven by the outputs of the clock chip. Remember that data
at the comparator input of the SVFC is loaded on the falling
edge of the clock signal and shifted out on the next rising edge.
Note that the frequency signals for each data channel are
available at the frequency output pin of each FVC.
If it is desired to reconstruct the analog voltages from the
multiplex signal, three more AD652 SVFC devices are used as
frequency-to-voltage converters, as shown in Figure 31. The
comparator inputs of all the devices are strapped together, the
“+” inputs are held at a 1.2 V TTL threshold, and the “−” inputs
are driven by the multiplex input. The three clock inputs are
Rev. C | Page 21 of 28
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