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AD565ATD 参数 Datasheet PDF下载

AD565ATD图片预览
型号: AD565ATD
PDF下载: 下载PDF文件 查看货源
内容描述: 高速12位单片D / A转换器 [High Speed 12-Bit Monolithic D/A Converters]
分类和应用: 转换器
文件页数/大小: 11 页 / 154 K
品牌: AD [ ANALOG DEVICES ]
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AD566A–SPECIFICATIONS
(T = +25 C, V
A
EE
= –15 V, unless otherwise noted)
AD566AK
Max
Min
Typ
Max
Units
AD566AJ
Model
DATA INPUTS (Pins 13 to 24)
TTL or 5 Volt CMOS
Input Voltage
Bit ON Logic “1”
Bit OFF Logic “0”
Logic Current (Each Bit)
Bit ON Logic “1”
Bit OFF Logic “0”
RESOLUTION
OUTPUT
Current
Unipolar (All Bits On)
Bipolar (All Bits On or Off)
Resistance (Exclusive of Span Resistors)
Offset
Unipolar (Adjustable to Zero per Figure 3)
Bipolar (Figure 4, R1 and R2 = 50
Fixed)
Capacitance
Compliance Voltage
T
MIN
to T
MAX
ACCURACY (Error Relative to
Full Scale) +25°C
T
MIN
to T
MAX
DIFFERENTIAL NONLINEARITY
+25°C
T
MIN
to T
MAX
TEMPERATURE COEFFICIENTS
Unipolar Zero
Bipolar Zero
Gain (Full Scale)
Differential Nonlinearity
SETTLING TIME TO 1/2 LSB
All Bits ON-to-OFF or OFF-to-ON (Figure 8)
FULL-SCALE TRANSITION
10% to 90% Delay plus Rise Time
90% to 10% Delay plus Fall Time
POWER REQUIREMENTS
V
EE
, –11.4 to –16.5 V dc
POWER SUPPLY GAIN SENSITIVITY
2
V
EE
= –11.4 to –16.5 V dc
PROGRAMMABLE OUTPUT RANGES
(see Figures 3, 4, 5)
1
Min
Typ
+2.0
0
+120
+35
+5.5
+0.8
+300
+100
12
+2.0
0
+120
+35
+5.5
+0.8
+300
+100
12
V
V
µA
µA
Bits
–1.6
0.8
6
–2.0
±
1.0
8
0.01
0.05
25
–2.4
1.2
10
0.05
0.15
+10
–1.6
0.8
6
–2.0
±
1.0
8
0.01
0.05
25
–2.4
1.2
10
0.05
0.1
+10
mA
mA
kΩ
% of F.S. Range
% of F.S. Range
pF
V
LSB
% of F.S. Range
LSB
% of F.S. Range
LSB
–1.5
±
1/4
(0.006)
±
1/2
(0.012)
–1.5
±
1/8
(0.003)
±
1/4
(0.006)
1/2
(0.012)
3/4
(0.018)
1/4
(0.006)
1/2
(0.012)
±
1/2
3/4
MONOTONICITY GUARANTEED
1
5
7
2
250
15
30
–12
15
0 to +5
–2.5 to +2.5
0 to +10
–5 to +5
–10 to +10
±
0.1
±
0.25
±
0.15
15
±
0.05
2
10
10
±
1/4
1/2
MONOTONICITY GUARANTEED
1
5
3
2
250
15
30
–12
15
0 to +5
–2.5 to +2.5
0 to +10
–5 to +5
–10 to +10
±
0.1
±
0.25
±
0.15
15
±
0.05
2
10
5
ppm/°C
ppm/°C
ppm/°C
ppm/°C
ns
ns
ns
mA
ppm of F.S./%
V
V
V
V
V
350
30
50
–18
25
350
30
50
–18
25
EXTERNAL ADJUSTMENTS
Gain Error with Fixed 50
Resistor for R2 (Figure 3)
Bipolar Zero Error with Fixed
50
Resistor for R1 (Figure 4)
Gain Adjustment Range (Figure 3)
Bipolar Zero Adjustment Range
REFERENCE INPUT
Input Impedance
POWER DISSIPATION
MULTIPLYING MODE PERFORMANCE (All Models)
Quadrants
Reference Voltage
Accuracy
Reference Feedthrough (Unipolar Mode,
All Bits OFF, and 1 V to +10 V [p-p], Sine Wave
Frequency for 1/2 LSB [p-p] Feedthrough)
Output Slew Rate 10%–90%
90%–10%
Output Settling Time (All Bits ON and a 0 V–10 V
Step Change in Reference Voltage)
CONTROL AMPLIFIER
Full Power Bandwidth
Small-Signal Closed-Loop Bandwidth
0.25
0.15
0.25
0.1
% of F.S. Range
% of F.S. Range
% of F.S. Range
% of F.S. Range
kΩ
mW
20
180
25
300
20
180
25
300
Two (2): Bipolar Operation at Digital Input Only
+1 V to +10 V, Unipolar
10 Bits (± 0.05% of Reduced F.S.) for 1 V dc Reference Voltage
40 kHz typ
5 mA/µs
1 mA/µs
1.5
µs
to 0.01% F.S.
300 kHz
1.8 MHz
NOTES
1
The digital input levels are guaranteed but not tested over the temperature range.
2
The power supply gain sensitivity is tested in reference to a V
EE
of –1.5 V dc.
Specifications subject to change without notice.
–4–
REV. D