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AD558JN 参数 Datasheet PDF下载

AD558JN图片预览
型号: AD558JN
PDF下载: 下载PDF文件 查看货源
内容描述: DACPORT低成本,完整的向上兼容的8位DAC [DACPORT Low Cost, Complete uP-Compatible 8-Bit DAC]
分类和应用: 转换器数模转换器光电二极管
文件页数/大小: 8 页 / 336 K
品牌: AD [ ANALOG DEVICES ]
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AD558
t
DH
DATA
INPUTS
t
DS
0.8V
2.0V
AD558
16
15
V
OUT
V
OUT
SENSE
R
L
CS OR CE
0.8V
2.0V
NEGATIVE
SUPPLY
R
P-D
= 2x V
EE
V
EE
(in kΩ)
t
W
1/2 LSB
DAC
V OUTPUT
t
SETTLING
t
W
= STORAGE PULSE WIDTH = 200ns MIN
t
DH
= DATA HOLD TIME = 10ns MIN
t
DS
= DATA SETUP TIME = 200ns MIN
t
SETTLING
= DAC OUTPUT SETTLING TIME TO
±1/2
LSB
Figure 9. Improved Settling Time
available, bipolar output ranges may be achieved by suitable
output offsetting and scaling. Figure 10 shows how a
±
1.28 volt
output range may be achieved when a –5 volt power supply is
available. The offset is provided by the AD589 precision 1.2 volt
reference which will operate from a +5 volt supply. The AD544
output amplifier can provide the necessary
±
1.28 volt output
swing from
±
5 volt supplies. Coding is complementary offset
binary.
5kΩ
V
OUT
= 0V TO +2.56V
16
+5V
0.01µF
Figure 7. AD558 Timing
USE OF V
OUT
SENSE
Separate access to the feedback resistor of the output amplifier
allows additional application versatility. Figure 8a shows how
I
×
R drops in long lines to remote loads may be cancelled by
putting the drops “inside the loop.” Figure 8b shows how the
separate sense may be used to provide a higher output current
by feeding back around a simple current booster.
V
OUT
V
OUT
SENSE
R
L
GAIN
SELECT
V
OUT
0V TO +10V
AD558
14
12
13
15
5kΩ
AD544
4.53kΩ
500Ω
BIPOLAR
OFFSET
ADJUST
1.5kΩ
–5V
0.01µF
V
O
+1.28 TO
–1.27
V
IN
AD589
AD558
12
13
GND
14
16
15
0.01µF
–1.2V
4.7kΩ
INPUT CODE
00000000
10000000
11111111
V
OUT
+128V
0V
–1.27V
–5V
a. Compensation for I
×
R Drops in Output Lines
V
CC
V
OUT
V
OUT
SENSE
2N2222
V
OUT
0V TO +2.56V
R
L
Figure 10. Bipolar Operation of AD558 from
±
5 V Supplies
MEASURING OFFSET ERROR
One of the most commonly specified endpoint errors associated
with real-world nonideal DACs is offset error.
In most DAC testing, the offset error is measured by applying
the zero-scale code and measuring the output deviation from 0
volts. There are some DACs, like the AD558 where offset errors
may be present but not observable at the zero scale, because of
other circuit limitations (such as zero coinciding with single-
supply ground) so that a nonzero output at zero code cannot be
read as the offset error. Factors like this make testing the
AD558 a little more complicated.
By adding a pulldown resistor from the output to a negative
supply as shown in Figure 11, we can now read offset errors
at zero code that may not have been observable due to circuit
limitations. The value of the resistor should be such that, at zero
voltage out, current through the resistor is 0.5 mA max.
OUTPUT
AMP
16
15
14
V
OUT
–V
V
OUT
SENSE
V
OUT
SELECT
AGND
0.5mA
AD558
12
13
GND
14
16
15
GAIN
SELECT
b. Output Current Booster
Figure 8. Use of V
OUT
Sense
OPTIMIZING SETTLING TIME
In order to provide single-supply operation and zero-based
output voltage ranges, the AD558 output stage has a passive
“pull-down” to ground. As a result, settling time for negative
going output steps may be longer than for positive-going output
steps. The relative difference depends on load resistance and
capacitance. If a negative power supply is available, the
negative-going settling time may be improved by adding a pull-
down resistor from the output to the negative supply as shown
in Figure 9. The value of the resistor should be such that, at
zero voltage out, current through that resistor is 0.5 mA max.
BIPOLAR OUTPUT RANGES
13
The AD558 was designed for operation from a single power
supply and is thus capable of providing only unipolar (0 V to
+2.56 V and 0 V to 10 V) output ranges. If a negative supply is
–6–
a. 0 V to 2.56 V Output Range
REV. A