AD5382
Mnemonic
Function
FIFOEN
FIFO Enable (Level Sensitive, Active High). When connected to DVDD, the internal FIFO is enabled, allowing the user
to write to the device at full speed. FIFO is only available in parallel interface mode. The status of the FIFO_EN pin is
sampled on power-up, and also following a CLEAR or RESET, to determine if the FIFO is enabled. In either serial or I2C
interface modes, the FIFO_EN pin should be tied low.
DB11 (SPI/I2C)
Multifunction Input Pin. In parallel interface mode, this pin acts as DB11 of the parallel input data-word. In serial
interface mode, this pin acts as serial interface mode select. When serial interface mode is selected (SER/PAR = 1) and
this input is low, SPI mode is selected. In SPI mode, DB12 is the serial clock (SCLK) input and DB13 is the serial data
(DIN) input.
When serial interface mode is selected (SER/PAR = 1) and this input is high I2C Mode is selected. In this mode, DB12 is
the serial clock (SCL) input and DB13 is the serial data (SDA) input.
DB12 (SCLK/SCL)
Multifunction Input Pin. In parallel interface mode, this pin acts as DB12 of the parallel input data-word. In serial
interface mode, this pin acts as a serial clock input.
Serial Interface Mode. In serial interface mode, data is clocked into the shift register on the falling edge of SCLK. This
operates at clock speeds up to 50 MHz.
I2C Mode. In I2C mode, this pin performs the SCL function, clocking data into the device. The data transfer rate in I2C
mode is compatible with both 100 kHz and 400 kHz operating modes.
DB13/(DIN/SDA)
NC
Multifunction Data Input Pin. In parallel interface mode, this pin acts as DB13 of the parallel input data-word.
Serial Interface Mode. In serial interface mode, this pin acts as the serial data input. Data must be valid on the falling
edge of SCLK.
I2C Mode. In I2C mode, this pin is the serial data pin (SDA) operating as an open-drain input/output.
No Connect. The user is advised not to connect any signals to these pins.
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