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AD1881AJST-REEL 参数 Datasheet PDF下载

AD1881AJST-REEL图片预览
型号: AD1881AJST-REEL
PDF下载: 下载PDF文件 查看货源
内容描述: [IC SPECIALTY CONSUMER CIRCUIT, PQFP48, PLASTIC, LQFP-48, Consumer IC:Other]
分类和应用: 商用集成电路
文件页数/大小: 26 页 / 256 K
品牌: ADI [ ADI ]
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AD1881A  
Extended Audio Status and Control Register (Index 2Ah)  
Reg  
Num  
Name  
D15 D14 D13 D12 D11 D10 D9  
D8  
X
D7  
X
D6  
X
D5  
X
D4  
X
D3  
X
D2  
X
D1  
X
D0  
Default  
2Ah Extended Audio St/Ctrl  
X
X
X
X
X
X
X
VRA 0000h  
Note: The Extended Audio Status and Control Register is a read/write register that provides status and control of the extended audio  
features.  
VRA  
Variable Rate Audio. VRA = 1 enables Variable Rate Audio mode (sample rate control registers and SLOTREQ  
signaling.  
PCM DAC Rate Register (Index 2Ch)  
Reg  
Num  
Name  
D15  
D14  
D13  
D12  
D11  
D10  
D9  
D8  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
Default  
2Ch/(7Ah) PCM DAC Rate SR15 SR14 SR13 SR12 SR11 SR10 SR9 SR8 SR7 SR6 SR5 SR4 SR3 SR2 SR1 SR0 BB80h  
Note: 2Ch is an alias for 7Ah. The VRA bit in register 2Ah must be set for the alias to work; if a zero is written to VRA, both sample  
rates are reset to 48k.  
SR[15:0]  
Writing to this register allows programming of the sampling frequency from 8 kHz (1B80h) to 48 kHz (BB80h) in  
1 Hz increments. Programming a value outside of the range 7040 Hz (1b80h) to 48000 Hz (bb80h) causes the codec  
to saturate to 48 kHz if a rate greater than 48 kHz is programmed or to 7.040 kHz if a rate less than 7.040 kHz is  
programmed. For all rates, if the value written to the register is supported, that value will be echoed back when read,  
otherwise the closest rate supported is returned.  
PCM ADC Rate Register (Index 32h)  
Reg  
Num  
Name  
D15  
D14  
D13  
D12  
D11  
D10  
D9  
D8  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
Default  
32h/(78h) PCM ADC Rate SR15 SR14 SR13 SR12 SR11 SR10 SR9 SR8 SR7 SR6 SR5 SR4 SR3 SR2 SR1 SR0 BB80h  
Note: 32h is an alias for 78h. The VRA bit in register 2Ah must be set for the alias to work; if a zero is written to VRA, both sample  
rates are reset to 48k.  
SR[15:0]  
Writing to this register allows programming of the sampling frequency from 8 kHz (1B80) to 48 kHz (BB80h) in  
1 Hz increments. Programming a value outside of the range 7040 Hz (1b80h) to 48000 Hz (bb80h) causes the codecto  
saturate to 48 kHz if a rate greater than 48 kHz is programmed, or to 7.040 kHz if a rate less than 7.040 kHz  
is programmed. For all rates, if the value written to the register is supported, that value will be echoed back  
when read, otherwise the closest rate supported is returned.  
Serial Configuration (Index 74h)  
Reg  
Num  
Name  
D15  
D14  
X
D13  
X
D12  
X
D11  
X
D10  
X
D9  
X
D8  
X
D7 D6 D5 D4 D3 D2  
D1  
X
D0  
X
Default  
7x0xh  
Serial  
Configuration  
SLOT  
16  
74h  
X
X
X
X
X
X
Note: This register is not reset when the reset register (register 00h) is written.  
SLOT16 Enable 16-bit slots.  
DRQEN and DxRQx are retained only for compatibility with the AD1819. New controller designs should use the VRA bit in register  
2Ah and the request bits in the status address slot instead.  
If your system uses only a single AD1881A, you can ignore the register mask and the slave 1/slave 2 request bits. If you write to  
this register, write ones to all of the register mask bits.  
SLOT16 makes all AC Link slots 16 bits in length, formatted into 16 slots.  
REV. 0  
–18–  
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