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AD1881AJST-REEL 参数 Datasheet PDF下载

AD1881AJST-REEL图片预览
型号: AD1881AJST-REEL
PDF下载: 下载PDF文件 查看货源
内容描述: [IC SPECIALTY CONSUMER CIRCUIT, PQFP48, PLASTIC, LQFP-48, Consumer IC:Other]
分类和应用: 商用集成电路
文件页数/大小: 26 页 / 256 K
品牌: ADI [ ADI ]
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AD1881A  
Subsection Ready Register (Index 26h)  
Reg  
Name  
D15  
D14 D13 D12 D11 D10 D9  
D8  
D7 D6 D5 D4 D3  
D2  
D1  
D0  
Default  
Num  
26h  
Power-Down Cntrl/Stat EAPD  
X
PR5 PR4 PR3 PR2 PR1 PR0  
X
X
X
X
REF ANL DAC ADC N/A  
Note: The ready bits are read only, writing to REF, ANL, DAC, ADC will have no effect. These bits indicate the status for the  
AD1881A subsections. If the bit is a one, then that subsection is “ready.” Ready is defined as the subsection able to perform in its  
nominal state.  
ADC  
DAC  
ANL  
ADC section ready to transmit data.  
DAC section ready to accept data.  
Analog gain, attenuators and mute blocks, and mixers ready.  
Voltage References, VREF and VREFOUT up to nominal level.  
REF  
PR[5:0]  
AD1881A Power-Down Modes. The first three bits are to be used individually rather than in combination with each  
other. The last bit PR3 can be used in combination with PR2 or by itself. The mixer and reference cannot be  
powered down via PR3 unless the ADCs and DACs are also powered down. Nothing else can be powered up until  
the reference is up.  
PR5 has no effect unless all ADCs, DACs, and the AC-Link are powered down. The reference and the mixer can  
either be up or down, but all power-up sequences must be allowed to run to completion before PR5 and PR4 are  
both set.  
In multiple-codec systems, the master codec’s PR5 and PR4 bits control the slave codec. PR5 is also effective in  
the slave codec if the master’s PR5 bit is clear, but the PR4 bit has no effect except to enable or disable PR5.  
EAPD  
External Audio Amp Power Down. Available when programmed as an AC’97 codec.  
0 = Pin 47 set to LO state (default).  
1 = Pin 47 set to HI state.  
Power-Down State  
PR5 PR4 PR3 PR2 PR1 PR0  
ADC Power-Down  
DAC Power-Down  
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
1
0
0
0
1
1
1
1
1
0
1
1
0
0
1
1
1
1
0
1
0
1
0
1
1
ADC and DAC Power-Down  
Mixer Power-Down  
ADC + Mixer Power-Down  
DAC + Mixer Power-Down  
ADC + DAC + Mixer Power-Down  
Standby  
Extended Audio ID Register (Index 28h)  
Reg  
Name  
D15 D14 D13 D12 D11 D10 D9  
ID1 ID0  
D8  
X
D7  
X
D6  
X
D5  
X
D4  
D3  
X
D2  
X
D1  
X
D0  
Default  
Num  
28h  
Extended Audio ID  
X
X
X
X
X
X
VRA 0000h  
Note: The Extended Audio ID is a read only register.  
VRA  
Variable Rate Audio. VRA = 1 enables Variable Rate Audio.  
ID[1:0]  
ID1, ID0 is a 2-bit field that indicates the codec configuration: Primary is 00; Secondary is 01, 10, or 11.  
REV. 0  
–17–  
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