ADP2325
Data Sheet
PACKAGING AND ORDERING INFORMATION
OUTLINE DIMENSIONS
5.10
5.00 SQ
4.90
0.30
0.25
0.18
PIN 1
INDICATOR
PIN 1
INDICATOR
25
24
32
1
0.50
BSC
3.25
3.10 SQ
2.95
EXPOSED
PAD
17
16
8
9
0.50
0.40
0.30
0.25 MIN
TOP VIEW
BOTTOM VIEW
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
0.80
0.75
0.70
0.05 MAX
0.02 NOM
SECTION OF THIS DATA SHEET.
COPLANARITY
0.08
0.20 REF
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MO-220-WHHD.
Figure 61. 32-Lead Lead Frame Chip Scale Package [LFCSP_WQ]
5 mm × 5 mm Body, Very Very Thin Quad
(CP-32-7)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
Temperature Range
Output Voltage
Package Description2
Package Option
CP-32-7
ADP2325ACPZ-R7
ADP2325-EVALZ
ADP2325-BL1-EVZ
ADP2325-BL2-EVZ
−40°C to +125°C
Adjustable
32-Lead LFCSP_WQ
Evaluation Board
Blank Dual Output Evaluation Board
Blank Single Output Evaluation Board
1 Z = RoHS Compliant Part.
2 For the blank evaluation boards, users can request an unpopulated board from Analog Devices, Inc., through the ADIsimPower tool found at
www.analog.com/ADIsimPower, as well as generate schematics and a bill of materials from the tool.
©2012 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
www.analog.com/ADP2325
D10036-0-2/12(0)
Rev. 0 | Page 32 of 32
ADI [ ADI ]
