(typical @ +25؇C and VS = ؎12 V or ؎15 V, and CH = Internal, A = +1,
AD585–SPECIFICATIONS HOLD active unless otherwise noted)
Model
AD585J
Typ
AD585A
Typ
AD585S
Typ
Min
Max
Min
Max
Min
Max
Units
SAMPLE/HOLD CHARACTERISTICS
Acquisition Time, 10 V Step to 0.01%
20 V Step to 0.01%
3
5
3
5
3
5
µs
µs
Aperture Time, 20 V p-p Input,
HOLD 0 V
Aperture Jitter, 20 V p-p Input,
35
35
35
ns
ns
HOLD 0 V
0.5
0.5
0.5
0.5
0.5
0.5
Settling Time, 20 V p-p Input,
HOLD 0 V, to 0.01%
Droop Rate
µs
mV/ms
1
1
1
Droop Rate TMIN to TMAX
Charge Transfer
Doubles Every 10°C
0.3
Double Every 10°C
0.3
Doubles Every 10°C
0.3
pC
Sample-to-Hold Offset
Feedthrough
20 V p-p, 10 kHz Input
TRANSFER CHARACTERISTICS1
Open Loop Gain
VOUT = 20 V p-p, RL = 2k
Application Resistor Mismatch
Common-Mode Rejection
VCM = ±10 V
–3
3
–3
80
3
–3
80
3
mV
0.5
0.5
0.5
mV
200,000
200,000
200,000
V/V
%
0.3
0.3
0.3
80
dB
Small Signal Gain Bandwidth
V
OUT = 100 mV p-p
2.0
160
10
2.0
160
10
2.0
160
10
MHz
kHz
V/µs
Full Power Bandwidth
VOUT = 20 V p-p
Slew Rate
V
OUT = 20 V p-p
Output Resistance (Sample Mode)
OUT = ±10 mA
I
0.05
0.05
0.05
Ω
Output Short Circuit Current
Output Short Circuit Duration
50
Indefinite
50
Indefinite
50
Indefinite
mA
ANALOG INPUT CHARACTERISTICS
Offset Voltage
Offset Voltage, TMIN to TMAX
Bias Current
Bias Current, TMIN to TMAX
Input Capacitance, f = 1 MHz
Input Resistance, Sample or Hold
20 V p-p Input, A = +1
5
6
2
5
2
3
2
5
2
3
mV
mV
nA
nA
pF
2
20
10
502
10
10
1012
1012
1012
Ω
DIGITAL INPUT CHARACTERISTICS
TTL Reference Output
Logic Input High Voltage
1.2
1.4
1.6
1.2
1.4
1.6
1.2
2.0
1.4
1.6
V
V
T
MIN to TMAX
2.0
2.0
Logic Input Low Voltage
TMIN to TMAX
Logic Input Current (Either Input)
0.8
50
0.8
50
0.7
50
V
µA
POWER SUPPLY CHARACTERISTICS
Operating Voltage Range
+5, –10.8
±18
+5, –10.8
±18
+5, –10.8
±18
V
Supply Current, RL = ∞
Power Supply Rejection, Sample Mode
6
70
10
6
70
10
6
70
10
mA
dB
TEMPERATURE RANGE
Specified Performance
0
+70
–25
+85
–55
+125
°C
PACKAGE OPTIONS3, 4
Cerdip (Q-14)
LCC (E-20A)
AD585AQ
AD585SQ
AD585SE
PLCC (P-20A)
AD585JP
NOTES
Specifications subject to change without notice.
1Maximum input signal is the minimum supply minus a headroom voltage of 2.5 V.
2Not tested at –55°C.
Specifications shown in boldface are tested on all production units at final electrical
test. Results from those tests are used to calculate outgoing quality levels.
All min and max specifications are guaranteed, although only those shown in
boldface are tested on all production units.
3E = Leadless Ceramic Chip Carrier; P = Plastic Leaded Chip Carrier; Q = Cerdip.
4For AD585/883B specifications, refer to Analog Devices Military Products Databook.
–2–
REV. A
ADI [ ADI ]
