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5962-9316401MXA 参数 Datasheet PDF下载

5962-9316401MXA图片预览
型号: 5962-9316401MXA
PDF下载: 下载PDF文件 查看货源
内容描述: 12位100 kSPS的A / D转换器 [12-Bit 100 kSPS A/D Converter]
分类和应用: 转换器模数转换器信息通信管理
文件页数/大小: 12 页 / 258 K
品牌: ADI [ ADI ]
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AD1674  
P IN D ESCRIP TIO N  
Sym bol  
P in No. Type  
Nam e and Function  
Analog Ground (Common).  
AGND  
A0  
9
4
P
DI  
Byte Address/Short Cycle. If a conversion is started with A0 Active LOW, a full 12-bit conversion  
cycle is initiated. If A0 is Active HIGH during a convert start, a shorter 8-bit conversion cycle  
results. During Read (R/C = 1) with 12/8 LOW, A0 = LOW enables the 8 most significant bits  
(DB4–DB11), and A0 = HIGH enables DB3–DB0 and sets DB7–DB4 = 0.  
BIP OFF  
12  
AI  
Bipolar Offset. Connect through a 50 resistor to REF OUT for bipolar operation or to Analog  
Common for unipolar operation.  
CE  
6
3
DI  
DI  
Chip Enable. Chip Enable is Active HIGH and is used to initiate a convert or read operation.  
Chip Select. Chip Select is Active LOW.  
CS  
DB11–DB8 27–24  
DO  
Data Bits 11 through 8. In the 12-bit format (see 12/8 and A0 pins), these pins provide the up-  
per 4 bits of data. In the 8-bit format, they provide the upper 4 bits when A0 is LOW and are  
disabled when A0 is HIGH.  
DB7–DB4  
DB3–DB0  
23–20  
19–16  
DO  
DO  
Data Bits 7 through 4. In the 12-bit format these pins provide the middle 4 bits of data. In the  
8-bit format they provide the middle 4 bits when Ao is LOW and all zeroes when A0 is HIGH.  
Data Bits 3 through 0. In the 12-bit format these pins provide the lower 4 bits of data. In the  
8-bit format these pins provide the lower 4 bits of data when A0 is HIGH, they are disabled  
when A0 is LOW.  
DGND  
REF OUT  
R/C  
15  
8
P
Digital Ground (Common).  
+10 V Reference Output.  
AO  
DI  
5
Read/Convert. In the full control mode R/C is Active HIGH for a read operation and Active LOW  
for a convert operation. In the stand-alone mode, the falling edge of R/C initiates a conversion.  
REF IN  
ST S  
10  
28  
AI  
Reference Input is connected through a 50 resistor to +10 V Reference for normal operation.  
DO  
Status is Active HIGH when a conversion is in progress and goes LOW when the conversion is  
completed.  
VCC  
7
P
+12 V/+15 V Analog Supply.  
–12 V/–15 V Analog Supply.  
+5 V Logic Supply.  
VEE  
11  
1
P
VLOGIC  
10 VIN  
P
13  
AI  
10 V Span Input, 0 V to +10 V unipolar mode or –5 V to +5 V bipolar mode. When using the  
AD1674 in the 20 V Span 10 VIN should not be connected.  
20 VIN  
14  
2
AI  
20 V Span Input, 0 V to +20 V unipolar mode or –10 V to +10 V bipolar mode. When using  
the AD1674 in the 10 V Span 20 VIN should not be connected.  
12/8  
DI  
T he 12/8 pin determines whether the digital output data is to be organized as two 8-bit words  
(12/8 LOW) or a single 12-bit word (12/8 HIGH).  
T YPE: AI  
=
=
=
Analog Input  
Analog Output  
Digital Input  
AO  
DI  
FUNCTIO NAL BLO CK D IAGRAM  
P IN CO NFIGURATIO N  
DO = Digital Output  
12/8  
CS  
P
=
Power  
V
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
1
2
3
4
5
6
7
8
9
STS  
LOGIC  
12/8  
STS  
DB11(MSB)  
DB10  
A
CONTROL  
0
CS  
CE  
A
0
DB9  
R/C  
R/C  
CE  
DB8  
DB7  
10V  
CLOCK  
SAR  
REF OUT  
AD1674  
REF  
DB6  
V
12  
CC  
TOP VIEW  
REF OUT  
AGND  
DB5  
DB4  
(Not to Scale)  
DB11 (MSB)  
DB0 (LSB)  
AGND  
COMP  
12  
20k  
REF IN 10  
DB3  
REF IN  
12  
V
11  
12  
13  
14  
DB2  
DB1  
5k  
10k  
10k  
EE  
BIP OFF  
BIP OFF  
20V  
IN  
DAC  
16 DB0(LSB)  
10V  
IN  
5k  
2.5k  
2.5k  
20V  
IN  
15  
DGND  
10V  
IN  
IDAC  
5k  
SHA  
AD1674  
REV. C  
–7–