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5962-9312901MPX 参数 Datasheet PDF下载

5962-9312901MPX图片预览
型号: 5962-9312901MPX
PDF下载: 下载PDF文件 查看货源
内容描述: [暂无描述]
分类和应用: 运算放大器放大器电路
文件页数/大小: 16 页 / 275 K
品牌: ADI [ ADI ]
 浏览型号5962-9312901MPX的Datasheet PDF文件第8页浏览型号5962-9312901MPX的Datasheet PDF文件第9页浏览型号5962-9312901MPX的Datasheet PDF文件第10页浏览型号5962-9312901MPX的Datasheet PDF文件第11页浏览型号5962-9312901MPX的Datasheet PDF文件第12页浏览型号5962-9312901MPX的Datasheet PDF文件第14页浏览型号5962-9312901MPX的Datasheet PDF文件第15页浏览型号5962-9312901MPX的Datasheet PDF文件第16页  
AD829  
+15V  
–17  
–20  
–23  
0.1F  
50⍀  
COAX  
CABLE  
50⍀  
COAX  
V
؎5V  
IN  
CABLE  
–26  
–29  
–32  
–35  
–38  
–41  
–44  
–47  
50⍀  
2k⍀  
AD829  
V
OUT  
؎15V  
50⍀  
50⍀  
3pF  
C
–15V  
0.1F  
COMP  
V
R
R
= –20dBM  
= 1k⍀  
= 1k⍀  
IN  
L
2k⍀  
F
GAIN = –1  
= 4pF  
C
COMP  
Figure 17. Noninverting Amplifier Connection Using  
Current Feedback Compensation  
1
10  
100  
FREQUENCY (MHz)  
+15V  
Figure 16. Closed-Loop Frequency Response vs. Supply  
for the Inverting Amplifier Using Current Feedback  
Compensation  
0.1F  
75⍀  
COAX  
V
IN  
CABLE  
A Low Error Video Line Driver  
75⍀  
V
AD829  
OUT  
The buffer circuit shown in Figure 18 will drive a back-terminated  
75 video line to standard video levels (1 V p-p) with 0.1 dB  
gain flatness to 30 MHz with only 0.04° and 0.02% differential  
phase and gain at the 4.43 MHz PAL color subcarrier frequency.  
This level of performance, which meets the requirements for high  
definition video displays and test equipment, is achieved using  
only 5 mA quiescent current.  
75⍀  
75⍀  
0.1F  
300⍀  
OPTIONAL  
2pF to 7pF  
FLATNESS  
TRIM  
–15V  
30pF  
C
COMP  
300⍀  
A High Gain, Video Bandwidth, Three Op Amp In Amp  
Figure 19 shows a three op amp instrumentation amplifier circuit  
that provides a gain of 100 at video bandwidths. At a circuit gain  
of 100, the small signal bandwidth equals 18 MHz into a FET  
probe. Small signal bandwidth equals 6.6 MHz with a 50 load.  
The 0.1% settling time is 300 ns.  
Figure 18. A Video Line Driver with a Flatness over  
Frequency Adjustment  
The input amplifiers operate at a gain of 20, while the output  
op amp runs at a gain of 5. In this circuit, the main bandwidth  
limitation is the gain/bandwidth product of the output amplifier.  
Extra care should be taken while breadboarding this circuit, since  
even a couple of extra picofarads of stray capacitance at the com-  
pensation pins of A1 and A2 will degrade circuit bandwidth.  
3pF  
(G = 20)  
2pF to 8pF  
SETTLING TIME  
AC CMR ADJUST  
+V  
IN  
A1  
AD829  
1k⍀  
2k⍀  
1pF  
200⍀  
200⍀  
AD848  
R
G
A3  
1pF  
210⍀  
INPUT  
2k⍀  
FREQUENCY CMRR  
(G = 5)  
2k⍀  
100 Hz  
1 MHz  
10 MHz  
64.6dB  
44.7dB  
23.9dB  
3pF  
970⍀  
AD829  
DC CMR  
ADJUST  
50⍀  
+V  
+15V  
COMM  
–15V  
PIN 7  
S
A2  
10F  
10F  
1F  
1F  
0.1F  
0.1F  
0.1F  
+V  
IN  
EACH  
AMPLIFIER  
(G = 20)  
0.1F  
3pF  
4000⍀  
G
CIRCUIT GAIN =  
+ 1 5  
(
(
R
–V  
PIN 4  
S
Figure 19. A High Gain, Video Bandwidth, Three Op Amp In Amp Circuit  
REV. G  
–13–  
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