AD7874
CO NVERTER D ETAILS
EXTERNAL REFERENCE
T he AD7874 is a complete 12-bit, 4-channel data acquisition
system. It is comprised of a 12-bit successive approximation
ADC, four high speed track/hold circuits, a four-channel analog
multiplexer and a 3 V Zener reference. T he ADC uses a succes-
sive approximation technique and is based on a fast-settling,
voltage switching DAC, a high speed comparator, a fast CMOS
SAR and high speed logic.
In some applications, the user may require a system reference or
some other external reference to drive the AD7874 reference in-
put. Figure 4 shows how the AD586 5 V reference can be used
to provide the 3 V reference required by the AD7874 REF IN.
+
15V
+V
IN
V
7R*
IN1
TO INTERNAL
COMPARATOR
GND
Conversion is initiated on the rising edge of CONVST. All four
input track/holds go from track to hold on this edge. Conversion
is first performed on the Channel 1 input voltage, then Channel
2 is converted and so on. T he four results are stored in on-chip
registers. When all four conversions have been completed, INT
goes low indicating that data can be read from these locations.
T he conversion sequence takes either 78 or 79 rising clock edges
depending on the synchronization of CONVST with CLK. In-
ternal delays and reset times bring the total conversion time
from CONVST going high to INT going low to 32.5 µs maxi-
mum for a 2.5 MHz external clock. T he AD7874 uses an im-
plicit addressing scheme whereby four successive reads to the
same memory location access the four data words sequentially.
T he first read accesses Channel 1 data, the second read accesses
Channel 2 data and so on. Individual data registers cannot be
accessed independently.
V
OUT
TRACK/HOLD 1
AD586
10kΩ
2.1R*
3R*
REF
IN
1kΩ
TO ADC
REFERENCE
CIRCUITRY
15kΩ
AGND
AD7874**
*R = 3.6kΩ TYP
**ADDITIONAL PINS OMITTED FOR CLARITY
Figure 4. AD586 Driving AD7874 REF IN
TRACK-AND -H O LD AMP LIFIER
INTERNAL REFERENCE
T he track-and-hold amplifier on each analog input of the
AD7874 allows the ADC to accurately convert an input sine
wave of 20 V p-p amplitude to 12-bit accuracy. T he input band-
width of the track/hold amplifier is greater than the Nyquist rate
of the ADC even when the ADC is operated at its maximum
throughput rate. T he small signal 3 dB cutoff frequency occurs
typically at 500 kHz.
T he AD7874 has an on-chip temperature compensated buried
Zener reference which is factory trimmed to 3 V ± 10 mV (see
Figure 3). T he reference voltage is provided at the REF OUT
pin. T his reference can be used to provide both the reference
voltage for the ADC and the bipolar bias circuitry. T his is
achieved by connecting REF OUT to REF IN.
T he four track/hold amplifiers sample their respective input
channels simultaneously. T he aperture delay of the track/hold
circuits is small and, more importantly, is well matched across
the four track/holds on one device and also well matched from
device to device. T his allows the relative phase information be-
tween different input channels to be accurately preserved. It also
allows multiple AD7874s to sample more than four channels
simultaneously.
VDD
TEMPERATURE
COMPENSATION
AD7874
T he operation of the track/hold amplifiers is essentially transpar-
ent to the user. Once conversion is initiated, the four channels
are automatically converted and there is no need to select which
channel is to be digitized.
V
SS
REF OUT
Figure 3. AD7874 Internal Reference
ANALO G INP UT
T he reference can also be used as a reference for other compo-
nents and is capable of providing up to 500 µA to an external
load. In systems using several AD7874s, using the REF OUT of
one device to provide the REF IN for the other devices ensures
good full-scale tracking between all the AD7874s. Because the
AD7874 REF IN is buffered, each AD7874 presents a high im-
pedance to the reference so one AD7874 REF OUT can drive
several AD7874 REF INs.
T he analog input of Channel 1 of the AD7874 is as shown in
Figure 4. T he analog input range is ±10 V into an input resis-
tance of typically 30 kΩ. T he designed code transitions occur
midway between successive integer LSB values (i.e., 1/2 LSB,
3/2 LSBs, 5/2 LSBs, . . . FS – 3/2 LSBs). T he output code is
2s complement binary with 1 LSB = FS/4096 = 20 V/4096 =
4.88 mV. T he ideal input/output transfer function is shown in
Figure 5.
T he maximum recommended capacitance on REF OUT for
normal operation is 50 pF. If the reference is required for other
system uses, it should be decoupled to AGND with a 200 Ω re-
sistor in series with a parallel combination of a 10 µF tantalum
capacitor and a 0.1 µF ceramic capacitor.
–6–
REV. C
ADI [ ADI ]
