AD7224–SPECIFICATIONS
(V = 11.4 V to 16.5 V, V = –5 V ؎ 10%; AGND = DGND = O V; V = +2 V to (V – 4 V)1 unless otherwise noted.
DD
SS
REF
DD
DUAL SUPPLY
All specifications TMIN to TMAX unless otherwise noted.)
K, B, T
L, C, U
P aram eter
Versions2
Versions2
Units
Conditions/Com m ents
ST AT IC PERFORMANCE
Resolution
8
8
Bits
T otal Unadjusted Error
Relative Accuracy
Differential Nonlinearity
Full-Scale Error
Full-Scale T emperature Coefficient
Zero Code Error
Zero Code Error T emperature Coefficient
±2
±1
±1
±3/2
±20
±30
±50
±1
±1/2
±1
LSB max
LSB max
LSB max
LSB max
ppm/°C max
mV max
VDD = +15 V ± 5%, VREF = +10 V
Guaranteed Monotonic
±1
±20
±20
±30
VDD = 14 V to 16.5 V, VREF = +10 V
µV/°C typ
REFERENCE INPUT
Voltage Range
2 to (VDD – 4)
8
100
2 to (VDD – 4)
8
100
V min to V max
kΩ min
pF max
Input Resistance
Input Capacitance3
Occurs when DAC is loaded with all 1s.
DIGIT AL INPUT S
Input High Voltage, VINH
Input Low Voltage, VINL
Input Leakage Current
Input Capacitance3
Input Coding
2.4
0.8
±1
2.4
0.8
±1
V min
V max
µA max
pF max
VIN = 0 V or VDD
8
8
Binary
Binary
DYNAMIC PERFORMANCE
Voltage Output Slew Rate3
Voltage Output Settling T ime3
Positive Full-Scale Change
Negative Full-Scale Change
Digital Feedthrough
2.5
2.5
V/µs min
5
7
50
2
5
7
50
2
µs max
µs max
nV secs typ
kΩ min
VREF = +10 V; Settling T ime to ±1/2 LSB
VREF = +10 V; Settling T ime to ±1/2 LSB
VREF = 0 V
Minimum Load Resistance
VOUT = +10 V
POWER SUPPLIES
VDD Range
VSS Range
IDD
11.4/16.5
4.5/5.5
11.4/16.5
4.5/5.5
V min/V max
V min/V max
For Specified Performance
For Specified Performance
@ 25°C
T MIN to T MAX
4
6
4
6
mA max
mA max
Outputs Unloaded; VIN = VINL or VINH
Outputs Unloaded; VIN = VINL or VINH
ISS
@ 25°C
T MIN to T MAX
3
5
3
5
mA max
mA max
Outputs Unloaded; VIN = VINL or VINH
Outputs Unloaded; VIN = VINL or VINH
SWIT CHING CHARACT ERIST ICS3, 4
t1
@ 25°C
T MIN to T MAX
t2
@ 25°C
T MIN to T MAX
t3
90
90
90
90
ns min
ns min
Chip Select/Load DAC Pulse Width
Write/Reset Pulse Width
90
90
90
90
ns min
ns min
@ 25°C
T MIN to T MAX
t4
@ 25°C
T MIN to T MAX
t5
@ 25°C
T MIN to T MAX
t6
0
0
0
0
ns min
ns min
Chip Select/Load DAC to Write Setup T ime
Chip Select/Load DAC to Write Hold T ime
Data Valid to Write Setup T ime
0
0
0
0
ns min
ns min
90
90
90
90
ns min
ns min
@ 25°C
T MIN to T MAX
10
10
10
10
ns min
ns min
Data Valid to Write Hold T ime
NOT ES
1Maximum possible reference voltage.
2T emperature ranges are as follows:
K, L Versions: –40°C to +85°C
B, C Versions: –40°C to +85°C
T , U Versions: –55°C to +125°C
3Sample T ested at 25°C by Product Assurance to ensure compliance.
4Switching characteristics apply for single and dual supply operation.
Specifications subject to change without notice.
–2–
REV. B
ADI [ ADI ]
