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5962-89710013A 参数 Datasheet PDF下载

5962-89710013A图片预览
型号: 5962-89710013A
PDF下载: 下载PDF文件 查看货源
内容描述: 锁存CMOS 8位/ 16通道模拟多路复用器 [CMOS Latched 8-/16-Channel Analog Multiplexers]
分类和应用: 复用器开关复用器或开关信号电路
文件页数/大小: 20 页 / 415 K
品牌: ADI [ ADI ]
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ADG526A/ADG527A  
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS  
V
1
2
3
4
5
6
7
8
9
28  
D
DD  
4
3
2
1
28 27 26  
NC  
RS  
27  
V
SS  
26 S8  
25 S7  
24 S6  
23 S5  
22 S4  
21 S3  
20 S2  
19 S1  
18 EN  
17 A0  
16 A1  
15 A2  
PIN 1  
IDENTFIER  
5
6
25  
S7  
S15  
S14  
S13  
S12  
S11  
S10  
S16  
S15  
S14  
S13  
S12  
S11  
24 S6  
ADG526A  
TOP VIEW  
(Not to Scale)  
23  
7
S5  
ADG526A  
22  
8
S4  
TOP VIEW  
(Not to Scale)  
21  
20  
9
S3  
S2  
10  
S09 11  
19 S1  
S10 10  
S9 11  
12 13 14 15 16 17 18  
NC = NO CONNECT  
GND 12  
WR 13  
A3 14  
NC = NO CONNECT  
Figure 4. ADG526A PLCC Pin Configuration  
Figure 3. ADG526A PDIP, SOIC, and CERDIP Pin Configuration  
Table 4. ADG526A Pin Function Descriptions  
Pin No. Mnemonic Description  
1
2
3
VDD  
NC  
RS  
Most Positive Power Supply Potential.  
No Connect.  
Reset. The RS signal clears both the address and enable data in the latches resulting in no output (all switches off).  
Source Terminal. This pin can be an input or output.  
Source Terminal. This pin can be an input or output.  
Source Terminal. This pin can be an input or output.  
Source Terminal. This pin can be an input or output.  
Source Terminal. This pin can be an input or output.  
Source Terminal. This pin can be an input or output.  
Source Terminal. This pin can be an input or output.  
4
5
6
7
8
9
S16  
S15  
S14  
S13  
S12  
S11  
S10  
S9  
GND  
WR  
A3  
A2  
A1  
A0  
EN  
S1  
S2  
S3  
S4  
S5  
S6  
S7  
S8  
VSS  
D
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
Source Terminal. This pin can be an input or output.  
Ground (0 V) Reference.  
Write. The WR signal latches the state of the address control lines and the enable line.  
Logic Control Inputs. Selects which source terminal is connected to the drain (D).  
Logic Control Inputs. Selects which source terminal is connected to the drain (D).  
Logic Control Inputs. Selects which source terminal is connected to the drain (D).  
Logic control inputs. Selects which source terminal is connected to the drain (D).  
Enable. Active high logic control input.  
Source Terminal. This pin can be an input or output.  
Source Terminal. This pin can be an input or output.  
Source Terminal. This pin can be an input or output.  
Source Terminal. This pin can be an input or output.  
Source Terminal. This pin can be an input or output.  
Source Terminal. This pin can be an input or output.  
Source Terminal. This pin can be an input or output.  
Source Terminal. This pin can be an input or output.  
Most Negative Power Supply Potential.  
Drain Terminal. This pin can be an input or output.  
Rev. C | Page 8 of 20