AD7846
Parameter1
J, A Versions
K, B Versions
Unit
Test Conditions/Comments
DIGITAL OUTPUTS
VOL (Output Low Voltage)
VOH (Output High Voltage)
Floating State Leakage Current
Floating State Output Capacitance2
0.4
4.0
±10
10
0.4
4.0
±10
10
V max
V min
μA max
pF max
ISINK = 1.6 mA
ISOURCE = 400 μA
DB0 to DB15 = 0 to VCC
POWER REQUIREMENTS3
VDD
VSS
VCC
IDD
+11.4/+15.75
−11.4/−15.75
+4.75/+5.25
5
+11.4/+15.75
−11.4/−15.75
+4.75/+5.25
5
V min/V max
V min/V max
V min/V max
mA max
VOUT unloaded
VOUT unloaded
ISS
5
5
mA max
ICC
1
1.5
100
1
1.5
100
mA max
LSB/V max
mW typ
Power Supply Sensitivity4
Power Dissipation
VOUT unloaded
1 Temperature ranges as follows: J, K versions: 0°C to +70°C; A, B versions: −40°C to +±5°C.
2 Guaranteed by design and characterization, not production tested.
3 The AD7±46 is functional with power supplies of ±12 V. See the Typical Performance Characteristics section.
4 Sensitivity of gain error, offset error, and bipolar zero error to VDD, VSS variations.
AC PERFORMANCE CHARACTERISTICS
These characteristics are included for design guidance and are not subject to test. VREF+ = +5 V; VDD = +14.25 V to +15.75 V; VSS = −14.25 V
to −15.75 V; VCC = +4.75 V to +5.25 V; RIN connected to 0 V, unless otherwise noted.
Table 2.
Parameter
ꢀimit at TMIN to TMAX (All Versions)
Unit
Test Conditions/Comments
Output Settling Time1
6
9
7
μs max
μs max
V/μs typ
To 0.006% FSR, VOUT loaded, VREF− = 0 V, typically 3.5 μs
To 0.003% FSR, VOUT loaded, VREF− = –5 V, typically 6.5 μs
Slew Rate
Digital-to-Analog Glitch
Impulse
70
nV-sec typ
DAC alternately loaded with 10…0000 and 01…1111,
V
OUT unloaded
AC Feedthrough
0.5
mV p-p typ VREF− = 0 V, VREF+ = 1 V rms, 10 kHz sine wave, DAC loaded
with all 0s
Digital Feedthrough
10
50
nV-sec typ
nV/√Hz typ Measured at VOUT, DAC loaded with 0111011…11,
REF+ = VREF− = 0 V
DAC alternately loaded with all 1s and all 0s. CS high
Output Noise Voltage
Density, 1 kHz to 100 kHz
V
1 LDAC
= 0. Settling time does not include deglitching time of 2.5 μs (typ).
Rev. G | Page 4 of 24
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