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5962-89481022A 参数 Datasheet PDF下载

5962-89481022A图片预览
型号: 5962-89481022A
PDF下载: 下载PDF文件 查看货源
内容描述: CMOS 12位单片乘法DAC [CMOS 12-Bit Monolithic Multiplying DAC]
分类和应用: 转换器数模转换器
文件页数/大小: 8 页 / 230 K
品牌: ADI [ ADI ]
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AD7541A  
APPLICATIONS HINTS  
SINGLE SUPPLY OPERATION  
Output Offset: CMOS D/A converters exhibit a code-dependent  
output resistance which in turn can cause a code-dependent  
error voltage at the output of the amplifier. The maximum am-  
plitude of this offset, which adds to the D/A converter nonlin-  
earity, is 0.67 VOS where VOS is the amplifier input offset  
voltage. To maintain monotonic operation it is recommended  
that VOS be no greater than (25 × 10–6) (VREF) over the tempera-  
ture range of operation. Suitable op amps are AD517L and  
AD544L. The AD517L is best suited for fixed reference appli-  
cations with low bandwidth requirements: it has extremely low  
offset (50 µV) and in most applications will not require an offset  
trim. The AD544L has a much wider bandwidth and higher  
slew rate and is recommended for multiplying and other appli-  
cations requiring fast settling. An offset trim on the AD544L  
may be necessary in some circuits.  
Figure 7 shows the AD7541A connected in a voltage switching  
mode. OUT1 is connected to the reference voltage and OUT2  
is connected to GND. The D/A converter output voltage is  
available at the VREF pin (Pin 17) and has a constant output  
impedance equal to RLDR. The feedback resistor RFB is not used  
in this circuit.  
V
= +15V  
DD  
NOT  
USED  
18  
16  
CA3140B  
R
V
DD  
FB  
1
2
OUT1  
OUT2  
V+  
V–  
V
AD7541A V  
REF  
+2.5V  
REF 17  
V
= 0V TO +10V  
OUT  
PINS 4–15  
15  
GND  
3
4
R2  
30kΩ  
R1  
10kΩ  
Digital Glitches: One cause of digital glitches is capacitive  
coupling from the digital lines to the OUT1 and OUT2 termi-  
nals. This should be minimized by screening the analog pins of  
the AD7541A (Pins 1, 2, 17, 18) from the digital pins by a  
ground track run between Pins 2 and 3 and between Pins 16  
and 17 of the AD7541A. Note how the analog pins are at one  
end of the package and separated from the digital pins by VDD  
and GND to aid screening at the board level. On-chip capacitive  
coupling can also give rise to crosstalk from the digital-to-analog  
sections of the AD7541A, particularly in circuits with high cur-  
rents and fast rise and fall times.  
BIT 1 – BIT 12  
SYSTEM  
GROUND  
V
±V  
D (1 +R2/R1) WHERE 0 D 1  
REF  
OUT  
i.e., D IS A FRACTIONAL REPRESENTATION OF THE DIGITAL INPUT  
Figure 7. Single Supply Operation Using Voltage Switch-  
ing Mode  
The reference voltage must always be positive. If OUT1 goes  
more than 0.3 V less than GND, an internal diode will be turned  
on and a heavy current may flow causing device damage (the  
AD7541A is, however, protected from the SCR latch-up  
phenomenon prevalent in many CMOS devices). Suitable refer-  
ences include the AD580 and AD584.  
Temperature Coefficients: The gain temperature coefficient  
of the AD7541A has a maximum value of 5 ppm/°C and a typi-  
cal value of 2 ppm/°C. This corresponds to worst case gain shifts  
of 2 LSBs and 0.8 LSBs, respectively, over a 100°C temperature  
range. When trim resistors R1 and R2 are used to adjust full-  
scale range, the temperature coefficient of R1 and R2 should  
also be taken into account. The reader is referred to Analog  
Devices Application Note “Gain Error and Gain Temperature  
Coefficient of CMOS Multiplying DACs,” Publication Number  
E630c-5-3/86.  
The loading on the reference voltage source is code-dependent  
and the response time of the circuit is often determined by the  
behavior of the reference voltage with changing load conditions.  
To maintain linearity, the voltage at OUT1 should remain within  
2.5 V of GND, for a VDD of 15 V. If VDD is reduced from 15 V  
or the reference voltage at OUT1 increased to more than 2.5 V,  
the differential nonlinearity of the DAC will increase and the  
linearity of the DAC will be degraded.  
SUPPLEMENTAL APPLICATION MATERIAL  
For further information on CMOS multiplying D/A converters,  
the reader is referred to the following texts:  
CMOS DAC Application Guide, Publication Number  
G872b-8-1/89 available from Analog Devices.  
Gain Error and Gain Temperature Coefficient of CMOS  
Multiplying DACs Application Note, Publication Number  
E630c-5-3/86 available from Analog Devices.  
Analog-Digital Conversion Handbook—available from Analog  
Devices.  
–6–  
REV. B