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5962-8871901MXA 参数 Datasheet PDF下载

5962-8871901MXA图片预览
型号: 5962-8871901MXA
PDF下载: 下载PDF文件 查看货源
内容描述: 单片12位四路DAC [Monolithic 12-Bit Quad DAC]
分类和应用: 转换器数模转换器信息通信管理
文件页数/大小: 23 页 / 671 K
品牌: ADI [ ADI ]
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AD664  
Figure 1a. 44-Pin Block Diagram  
FUNCTIONAL DESCRIPTION  
tions. This register may also be read back to check its contents.  
A RESET-TO-ZERO feature allows all DACs to be reset to 0  
volts out by strobing a single pin.  
The AD664 combines four complete 12-bit voltage output D/A  
converters with a fast, flexible digital input/output port on one  
monolithic chip. It is available in two forms, a 44-pin version  
shown in Figure 1a and a 28-pin version shown in Figure 1b.  
44-Pin Versions  
Each DAC offers flexibility, accuracy and good dynamic perfor-  
mance. The R-2R structure is fabricated from thin-film resistors  
which are laser-trimmed to achieve 1/2 LSB linearity and guar-  
anteed monotonicity. The output amplifier combines the best  
features of the bipolar and MOS devices to achieve good dy-  
namic performance and low offset. Settling time is under 10 µs  
and each output can drive a 5 mA, 500 pF load. Short-circuit  
protection allows indefinite shorts to VLL, VCC, VEE and GND.  
The output and span resistor pins are available separately. This  
feature allows a user to insert current-boosting elements to in-  
crease the drive capability of the system, as well as to overcome  
parasitics.  
Digital circuitry is implemented in CMOS logic. The fast, low  
power, digital interface allows the AD664 to be interfaced with  
most microprocessors. Through this interface, the wide variety  
of features on each chip may be accessed. For example, the in-  
put data for each DAC is programmed by way of 4-, 8-, 12- or  
16-bit words. The double-buffered input structure of this latch  
allows all four DACs to be updated simultaneously. A readback  
feature allows the internal registers to be read back through the  
same digital port, as either 4-, 8- or 12-bit words. When dis-  
abled, the readback drivers are placed in a high impedance  
(tristate) mode. A TRANSPARENT mode allows the input data  
to pass straight through both ranks of input registers and appear  
at the DAC with a minimum of delay. One D/A may be placed  
in the transparent mode at a time, or all four may be made  
transparent at once. The MODE SELECT feature allows the  
output range and mode of the DACs to be selected via the data  
bus inputs. An internal mode select register stores the selec-  
Figure 1b. 28-Pin Block Diagram  
28-Pin Versions  
The 28-pin versions are dedicated versions of the 44-pin  
AD664. Each offers a reduced set of features from those offered  
in the 44-pin version. This accommodates the reduced number  
of package pins available. Data is written and read with 12-bit  
words only. Output range and mode select functions are also  
not available in 28-pin versions. As an alternative, users specify  
either the UNI (unipolar, 0 to VREF) models or the BIP (bipolar,  
–VREF to VREF) models depending on the application require-  
ments. Finally, the transparent mode is not available on the  
28-pin versions.  
D
REV.  
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