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5962-0150601HXA 参数 Datasheet PDF下载

5962-0150601HXA图片预览
型号: 5962-0150601HXA
PDF下载: 下载PDF文件 查看货源
内容描述: 双通道, 14位, 65 MSPS A / D转换器的模拟输入信号调理 [Dual Channel, 14-Bit, 65 MSPS A/D Converter with Analog Input Signal Conditioning]
分类和应用: 转换器
文件页数/大小: 20 页 / 1431 K
品牌: ADI [ ADI ]
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AD13465  
Test  
Level  
Mil Sub-  
Group  
AD13465AZ/BZ  
Typ  
Parameter  
Temp  
Min  
Max  
Unit  
SPURIOUS-FREE DYNAMIC RANGE9  
Analog Input @ 4.98 MHz  
Analog Input @ 9.9 MHz  
25°C  
25°C  
Full  
25°C  
Full  
V
I
II  
I
II  
V
V
85  
86  
84  
76  
74  
63  
62  
dBFS  
dBFS  
dBFS  
dBFS  
dBFS  
dBFS  
dBFS  
4
5, 6  
4
80  
78  
70  
69  
Analog Input @ 21 MHz  
Analog Input @ 32 MHz  
5, 6  
25°C  
Full  
SINGLE-ENDED ANALOG INPUT  
Pass Band Ripple to 10 MHz  
Pass Band Ripple to 25 MHz  
25°C  
25°C  
V
V
0.05  
0.1  
dB  
dB  
DIFFERENTIAL ANALOG INPUT  
Pass Band Ripple to 10 MHz  
Pass Band Ripple to 25 MHz  
25°C  
25°C  
V
V
0.3  
0.82  
dB  
dB  
TWO-TONE IMD REJECTION10  
fIN = 9.1 MHz and 10.1 MHz  
f1 and f2 are –7 dB  
fIN = 19.1 MHz and 20.7 MHz  
f1 and f2 are –7 dB  
25°C  
Full  
25°C  
I
II  
V
4
5, 6  
77.5  
76.5  
82  
80  
72  
dBc  
dBc  
CHANNEL-TO-CHANNEL ISOLATION11  
25°C  
25°C  
IV  
V
12  
90  
dB  
ns  
TRANSIENT RESPONSE  
15.3  
DIGITAL OUTPUTS12  
Logic Compatibility  
DVCC = 3.3 V  
CMOS  
Logic 1 Voltage  
Logic 0 Voltage  
DVCC = 5 V  
Full  
Full  
I
I
1, 2, 3  
1, 2, 3  
2.5  
DVCC – 0.2  
0.2  
V
V
0.5  
Logic 1 Voltage  
Logic 0 Voltage  
Output Coding  
Full  
Full  
V
V
DVCC – 0.3  
0.35  
Two’s Complement  
V
V
POWER SUPPLY  
AVCC Supply Voltage13  
I (AVCC) Current  
Full  
Full  
Full  
Full  
Full  
Full  
Full  
Full  
Full  
VI  
V
VI  
V
VI  
V
I
4.85  
5.0  
270  
–5.0  
38  
3.3  
5.25  
308  
–4.75  
49  
3.465  
46  
V
mA  
V
mA  
V
mA  
mA  
W
AVEE Supply Voltage13  
I (AVEE) Current  
–5.25  
3.135  
DVCC Supply Voltage13  
I (DVCC) Current  
(Total) Supply Current per Channel  
Power Dissipation (Total)  
Power Supply Rejection Ratio (PSRR)  
34  
1, 2, 3  
1, 2, 3  
369  
3.57  
0.02  
403  
3.9  
I
V
% FSR/  
% VS  
NOTES  
1Gain tests are performed on AMP-IN-X-1 input voltage range.  
2Input capacitance spec. combines AD8037 capacitance and ceramic package capacitance.  
3Full Power Bandwidth is the frequency at which the spectral power of the fundamental frequency (as determined by FFT analysis) is reduced by 3 dB.  
4For differential input: +IN = 1 V p-p and –IN = 1 V p-p (signals are 180° out of phase). For single ended input: +IN = 2 V p-p and –IN = GND.  
5All AC specifications tested by driving ENCODE and ENCODE differentially. AMP-IN-X-1 = 1 V p-p, AMP-IN-X-2 = GND.  
6Minimum and Maximum conversion rates allow for variation in Encode Duty Cycle of 50% 5%.  
7Analog Input signal power at –1 dBFS; signal-to-noise ratio (SNR) is the ratio of signal level to total noise (first five harmonics removed).  
Encode = 65 MSPS. SNR is reported in dBFS, related back to converter full scale.  
8Analog Input signal power at –1 dBFS; signal-to-noise and distortion (SINAD) is the ratio of signal level to total noise + harmonics.  
Encode = 65 MSPS. SINAD is reported in dBFS, related back to converter full scale.  
9Analog Input signal power at –1 dBFS; SFDR is ratio of converter full scale to worst spur.  
10Both input tones at –7 dBFS; two tone intermodulation distortion (IMD) rejection is the ratio of either tone to the worst third order intermod product.  
11Channel-to-channel isolation tested with A Channel grounded and a full-scale signal applied to B Channel.  
12Digital output logic levels: DVCC = 3.3 V, CLOAD = 10 pF. Capacitive loads > 10 pF will degrade performance.  
13Supply voltage recommended operating range. AVCC may be varied from 4.85 V to 5.25 V. However, rated ac (harmonics) performance is valid only over the range  
AVCC = 5.0 V to 5.25 V.  
Specifications subject to change without notice.  
–3–  
REV. 0