AD6645
ABSOLUTE MAXIMUM RATINGS
Table 5.
Values of θJA are provided for package comparison and PCB
design considerations. θJA can be used for a first-order
approximation of TJ by the equation
Parameter
Rating
Electrical
TJ = TA + (θJA × PD)
where:
AVCC Voltage
DVCC Voltage
0 V to 7 V
0 V to 7 V
0 V to AVCC
2ꢀ mA
0 V to AVCC
4 mA
Analog Input Voltage
Analog Input Current
Digital Input Voltage
Digital Output Current
Environmental
Operating Temperature Range (Ambient)
AD664ꢀ-80
AD664ꢀ-10ꢀ
TA is the ambient temperature (°C).
PD is the power dissipation (W).
EXPLANATION OF TEST LEVELS
I.
100% production tested.
−40°C to +8ꢀ°C
−10°C to +8ꢀ°C
1ꢀ0°C
300°C
−6ꢀ°C to +1ꢀ0°C
II. 100% production tested at 25°C and guaranteed by design
and characterization at temperature extremes.
Maximum Junction Temperature
Lead Temperature (Soldering, 10 sec)
Storage Temperature Range (Ambient)
III. Sample tested only.
IV. Parameter is guaranteed by design and characterization
testing.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
V.
Parameter is a typical value only.
ESD CAUTION
THERMAL RESISTANCE
The heat sink of the AD6645ASVZ, 52-lead TQFP_EP (SV-52-1)
package must be soldered to the PCB GND plane to meet thermal
specifications.
Table 6. Thermal Characteristics
Package Type
Rating
ꢀ2-Lead TQFP_EP
θJA (0 m/sec airflow)1, 2, 3
θJMA (1.0 m/sec airflow)2, 3, 4, ꢀ
θJC
23°C/W, soldered heat sink
17°C/W, soldered heat sink
2°C/W, soldered heat sink
6, 7
ꢀ2-Lead LQFP_PQ4
θJA (0 m/sec airflow)1, 2, 3
θJMA (1.0 m/sec airflow)2, 3, 4, ꢀ
θJA (0 m/sec airflow)1, 2, 3
θJMA (1.0 m/sec airflow)2, 3, 4, ꢀ
30°C/W, unsoldered heat sink
24°C/W, unsoldered heat sink
23°C/W, soldered heat sink
17°C/W, soldered heat sink
2°C/W
6, 7
θJC
1 Per JEDEC JESDꢀ1-2 (heat sink soldered to PCB).
2 2S2P JEDEC test board.
3 Values of θJA are provided for package comparison and PCB design
considerations.
4 Per JEDEC JESDꢀ1-6 (heat sink soldered to PCB).
ꢀ Airflow increases heat dissipation, effectively reducing θJA. Furthermore, the
more metal that is directly in contact with the package leads from metal
traces, throughholes, ground, and power planes, the more θJA is reduced.
6 Per MIL-STD-883, Method 1012.1.
7 Values of θJC are provided for package comparison and PCB design
considerations when an external heat sink is required.
Rev. D | Page 7 of 24
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