PAC5225
Power Application Controller
LIST OF FIGURES
Figure 1-1. Power Application Controller................................................................................................................7
Figure 2-1. Simplified Application Diagram............................................................................................................8
Figure 7-1. Architectural Block Diagram...............................................................................................................12
Figure 8-1. PAC5225QM Pin Configuration (TQFN66-48 Package)....................................................................13
Figure 9-1. Power Supply Bypass Capacitor Routing..........................................................................................19
Figure 10-1. Multi-Mode Power Manager.............................................................................................................20
Figure 10-2. Buck Mode.......................................................................................................................................21
Figure 10-3. SEPIC Mode....................................................................................................................................21
Figure 10-4. Flyback Mode...................................................................................................................................22
Figure 10-5. Linear Regulators.............................................................................................................................23
Figure 10-6. Power Up Sequence........................................................................................................................23
Figure 11-1. Configurable Analog Front End........................................................................................................29
Figure 12-1. Application Specific Power Drivers...................................................................................................40
Figure 12-2. Typical Gate Driver Connections......................................................................................................41
Figure 12-3. High-Side Switching Transients and Optional Circuitry....................................................................42
Figure 13-1. ADC with Auto-Sampling Sequencer................................................................................................46
Figure 14-1. Memory System...............................................................................................................................48
Figure 15-1. Clock Control System......................................................................................................................50
Figure 16-1. ARM Cortex-M0 Microcontroller Core..............................................................................................53
Figure 17-1. I/O controller....................................................................................................................................55
Figure 18-1. Serial Interface.................................................................................................................................57
Figure 18-2. I2C Timing Diagram..........................................................................................................................61
Figure 18-3. SPI Timing Diagram.........................................................................................................................62
Figure 19-1. Timers A, B, C, and D......................................................................................................................63
Figure 19-2. SOC Bus Watchdog and Wake-Up Timer........................................................................................64
Figure 19-3. Real-Time Clock and Watchdog Timer.............................................................................................64
Figure 21-1. 3-phase Motor Drive Using PAC5225 (Simplified Diagram).............................................................67
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Rev 2.0‒September 22, 2017