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PAC5225QM 参数 Datasheet PDF下载

PAC5225QM图片预览
型号: PAC5225QM
PDF下载: 下载PDF文件 查看货源
内容描述: [Power Application Controller]
分类和应用:
文件页数/大小: 71 页 / 931 K
品牌: ACTIVE-SEMI [ ACTIVE-SEMI, INC ]
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PAC5225  
Power Application Controller  
5. FEATURES  
Proprietary Multi-Mode Power Manager  
Multi-mode switching supply controller configurable for high-voltage buck SEPIC or AC/DC Flyback  
topologies  
DC supply up to 70V or line AC input  
4 linear regulators with power and hibernate management  
Power and temperature monitor, warning, and fault detection  
Proprietary Configurable Analog Front End  
10 analog front end I/O pins  
3 differential programmable gain amplifiers  
4 single-ended programmable gain amplifiers  
10 comparators  
2 DACs (10-bit and 8-bit)  
Low-speed clock output for optimizing UL/IEC60730 Class B Safety Applications  
Proprietary Application Specific Power Drivers  
3 low-side and 3 high-side gate drivers with 1A gate driving capability  
Configurable delays and fast fault protection  
50MHz ARM Cortex-M0 32-bit microcontroller core  
Fast single cycle 32-bit x 32-bit multiplier  
24-bit SysTick timer  
Nested vectored interrupt controller (NVIC) with 20 external interrupts  
Wake-up interrupt controller allowing power-saving sleep modes  
Clock-gating allowing low power operation  
32kB FLASH and 8kB SRAM memory  
10-bit 1µs ADC with multi-input/multi-sample control engine  
9 ADC inputs including input from configurable analog front end  
3.3V I/Os  
3 general purpose I/Os with tri-state and dedicated analog input to ADC  
True 5V I/Os  
12 general purpose I/Os with tri-state, pull-up and pull-down and dedicated I/O supply  
Configurable as true 5V or 3.3V I/Os  
Flexible clock and PLL from internal 2% oscillator, ring oscillator, external clock, or crystal  
9 timing generators  
Four 16-bit timers with up to 16 PWM/CC blocks and 7 independent dead-time controllers  
24-bit watchdog timer  
4s or 8s watchdog timer  
24-bit real time clock  
24-bit SysTick timer  
Wake-up timer for sleep modes from 0.125s to 8s  
SPI, I2C, and UART communication interfaces  
SWD debug interface with interface disable function  
- 10 -  
Rev 2.0‒September 22, 2017  
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