ACT8937A
Rev 1, 22-Oct-12
SYSTEM CONTROL INFORMATION
Interfacing with the Samsung S5PC100, S5PC110 and S5PV210 Processors
The ACT8937A is optimized for use in applications
using the S5PC100, S5PC110 and S5PV210
processors, supporting both the power domains as
well as the signal interface for these processors.
between these devices benefits by doing so, both
the ACT8937A pin names and the Samsung
processor pin names are provided. When this is
done, the S5PV210 pin names are located after the
ACT8937A pin names, and are italicized and
located inside parentheses. For example, PWREN
(XPWRRGTON) refers to the logic signal applied to
the ACT8937A's PWREN input, identifying that it is
driven from the S5PV210's XPWRRGTON output.
Likewise, OUT1 (VDD_IO) refers to ACT8937A's
OUT1 pin, identifying that it is connected to the
S5PV210's VDD_IO power domain.
The following paragraphs describe how to design
ACT8937A with S5PV210 Processor, but the
design guidelines are directly applicable to
S5PC100 and S5PC110 as well.
While the ACT8937A supports many possible
configurations for powering these processors, one
of the most common configurations is detailed in
this datasheet. In general, this document refers to
the ACT8937A pin names and functions. However,
in cases where the description of interconnections
Table 2:
ACT8937A and Samsung S5PV210 Power Domains
POWER DOMAIN
VDD_IO
ACT8937A CHANNEL
REG1
TYPE
DC/DC
DC/DC
DC/DC
LDO
DEFAULT VOLTAGE
CURRENT CAPABILITY
1100mA
3.3V
1.1V/1.V
1.25V/1.25V
1.1V
VDD_INT
REG2
1100mA
VDD_ARM
REG3
1200mA
VDD_xPLL
REG4
150mA
VDD_Alive
REG5
LDO
1.1V
150mA
VDD_UOTG_D
VDD_UOTG_A
REG6
LDO
1.1V
250mA
REG7
LDO
3.3V
250mA
Table 3:
ACT8937A and Samsung S5PV210 Power Modes
POWER
QUIESCENT
CURRENT
CONTROL STATE
MODE
POWER DOMAIN STATE
REG1, REG2, REG3, REG4, REG5,
REG6 and REG7 are all on
ALL ON
PWRHLD is asserted, PWREN is asserted
420µA
PWRHLD is asserted, PWREN is asserted,
REG6 and REG7 are disabled after system
boots up.
REG1, REG2, REG3, REG4 and
REG5 are on. REG6 and REG7 are off
NORMAL
340µA
REG1 and REG5 are on. REG2, REG3,
REG4, REG6 and REG7 are off
SLEEP
PWRHLD is asserted, PWREN is de-asserted
190µA
<18µA
PWRHLD is de-asserted, PWREN is de-
asserted
REG1, REG2, REG3, REG4, REG5,
REG6 and REG7 are all off
ALL OFF
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