ACT8935
Rev 4, 17-Sep-13
FUNCTIONAL DESCRIPTION
I2C Interface
below the SYSLEV[-] voltage threshold:
1) If nSYSMODE[-] = 1 (default case), when system
The ACT8935 features an I2C interface that allows
advanced programming capability to enhance
overall system performance. To ensure
voltage level interrupt is unmasked
(nSYSLEVMSK[ ]=1) and VVSYS falls below the
programmable threshold, the ACT8935 asserts
nIRQ, providing a software “under-voltage alarm”.
The response to this interrupt is controlled by the
CPU, but will typically initiate a controlled shutdown
sequence either or alert the user that the battery is
low. In this case the interrupt is cleared when VVSYS
rises up again above the SYSLEV rising threshold
and nSYSSTAT[-] is read via I2C.
compatibility with
a
wide range of system
processors, the I2C interface supports clock speeds
of up to 400kHz (“Fast-Mode” operation) and uses
standard I2C commands. I2C write-byte commands
are used to program the ACT8935, and I2C read-
byte commands are used to read the ACT8935’s
internal registers. The ACT8935 always operates as
a slave device, and is addressed using a 7-bit slave
address followed by an eighth bit, which indicates
whether the transaction is a read-operation or a
write-operation, [1011011x].
2) If nSYSMODE[-] = 0, when VVSYS falls below the
programmable threshold the ACT8935 shuts down,
immediately disabling all regulators. This option is
useful for implementing a programmable “under-
voltage lockout” function that forces the system off
when the battery voltage falls below the SYSLEV
threshold voltage. Since this option does not
support a controlled shutdown sequence, it is
generally used as a "fail-safe" to shut the system
down when the battery voltage is too low.
SDA is a bi-directional data line and SCL is a clock
input. The master device initiates a transaction by
issuing a START condition, defined by SDA
transitioning from high to low while SCL is high.
Data is transferred in 8-bit packets, beginning with
the MSB, and is clocked-in on the rising edge of
SCL. Each packet of data is followed by an
“Acknowledge” (ACK) bit, used to confirm that the
data was transmitted successfully.
Table 6:
SYSLEV Falling Threshold
For more information regarding the I2C 2-wire serial
interface, go to the NXP website: http://www.nxp.com.
SYSLEV Falling Threshold
SYSLEV[3:0]
(Hysteresis = 200mV)
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3.0
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
Voltage Monitor and Interrupt
Programmable System Voltage Monitor
The ACT8935 features a programmable system-
voltage monitor, which monitors the voltage at
VSYS and compares it to
a programmable
threshold voltage. The programmable voltage
threshold is programmed by SYSLEV[3:0], as
shown in Table 6.
SYSLEV[ ] is set to 3.0V by default. There is a
200mV rising hysteresis on SYSLEV[ ] threshold
such that VVSYS needs to be 3.2V(typ) or higher in
order to power up the IC.
The nSYSSTAT[-] bit reflects the output of an
internal voltage comparator that monitors VVSYS
relative to the SYSLEV[-] voltage threshold, the
value of nSYSTAT[-] = 1 when VVSYS is lower than
the SYSLEV[-] voltage threshold, and nSYSTAT[-] =
0 when VVSYS is higher than the SYSLEV[-] voltage
threshold. Note that the SYSLEV[-] voltage
threshold is defined for falling voltages, and that the
comparator produces about 200mV of hysteresis at
VSYS. As a result, once VVSYS falls below the
SYSLEV threshold, its voltage must increase by
more than about 200mV to clear that condition.
Precision Voltage Detector
The LBI input connects to one input of a precision
voltage comparator, which can be used to monitor a
system voltage such as the battery voltage. An
external resistive-divider network can be used to set
voltage monitoring thresholds, as shown in
Functional Block Diagram. The output of the
comparator is present at the nLBO open-drain
output.
After the IC is powered up, the ACT8935 responds
in one of two ways when the voltage at VSYS falls
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