ACT8846
Rev 4, 25-May-16
SYSTEM CONTROL INFORMATION
Interfacing with the Rockchip RK31x8 processors
The ACT8846 is optimized for the Rockchip
RK31x8 processors, supporting both the power
domains as well as the signal interface. The
following paragraphs describe how to design
ACT8846 with the RK31x8 processors.
between these devices benefits by doing so, both
the ACT8846 pin names and the RK31x8
processors pin names are provided. When this is
done, the RK31x8 pin names are located after the
ACT8846 pin names, and are italicized and located
inside parentheses. For example, PWREN (GPIOX)
refers to the logic signal applied to the ACT8846's
PWREN input, identifying that it is driven from the
RK31x8's GPIOX output.
While the ACT8846 supports many possible
configurations for powering these processors, one
of the most common configurations is detailed in
this datasheet. In general, this document refers to
the ACT8846 pin names and functions. However, in
cases where the description of interconnections
Table 1:
ACT8846 and Rockchip RK31x8 Power Domains
ACT8846
REGULATOR
DEFAULT
VOLTAGE CURRENT
MAX
POWER UP
ORDER
ON/OFF @
SLEEP
POWER DOMAIN
TYPE
REG1
REG2
REG3
REG4
REG5
REG6
REG7
REG8
REG9
REG10
REG11
VCC_DDR
VDD_LOG
VDD_ARM
VCC_IO
Adjustable
1.0V
1.5A
2.8A
5
5
4
1
2
/
ON
ON
DC/DC Step Down
DC/DC Step Down
DC/DC Step Down
DC/DC Step Down
Low-Noise LDO
1.0V
2.8A
OFF
ON
3.0V
1.5A
VDD_10
1.0V
150mA
150mA
350mA
350mA
350mA
150mA
350mA
ON
VDD_JETTA1V2
VCC18_CIF
VCCA_33
1.2V
OFF
OFF
OFF
OFF
OFF
ON
Low-Noise LDO
1.8V
/
Low-Noise LDO
3.3V
/
Low-Noise LDO
VCC_TP
3.3V
/
Low-Noise LDO
VCC_JETTA3V3
VCC18_IO
3.3V
/
Low Input-Voltage LDO
Low Input-Voltage LDO
1.8V
3
REG12
REG13
VCC28_CIF
VDD_RTC
2.8V
1.8V
350mA
50mA
/
OFF
ON
Low Input-Voltage LDO
Always-ON LDO
0
Table 2:
ACT8846 and Rockchip RK31x8 Power Mode
Power Mode
Control State
Power Domain State
All Regulators ON
Quiescent Current
PWRHLD is asserted, PWREN is
asserted
ALL ON
0.6mA
PWRHLD is de-asserted, PWREN is REG13 is ON, all other regula-
SHUTDOWN
ALL OFF
10µA
5µA
de-asserted, VINL2 > 2.6V
tors are off.
PWRHLD is de-asserted, PWREN is
de-asserted, VINL2 < 2.2V
All regulators off.
Innovative PowerTM
- 28 -
www.active-semi.com
ActivePMUTM is a trademark of Active-Semi.
Copyright © 2016 Active-Semi, Inc.
I2CTM is a trademark of NXP.