®
ACT5830
Rev 2, 20-Jan-11
SYSTEM MANAGEMENT
I2C INTERFACE ELECTRICAL CHARACTERISTICS
PARAMETER
SCL, SDA Low Input Voltage
TEST CONDITIONS
MIN
TYP
MAX
UNIT
V
0.4
SCL, SDA High Input Voltage
1.4
V
SCL, SDA Leakage Current
VCHG_IN = 4.2V
1
µA
V
SDA Low Output Voltage
I
OL = 5mA
0.3
SCL Clock Period, tSCL
fSCL clock freq = 400kHz
2.5
100
300
100
100
µs
ns
ns
ns
ns
SDA Data In Setup Time to SCL High, tSU
SDA Data Out Hold Time after SCL Low, tHD
SDA Data Low Setup Time to SCL Low, tST
Start Condition
SDA Data High Hold Time after Clock High, tSP Stop Condition
Figure 1:
I2C Serial Bus Timing
Note: Each session of data transfer is with a start condition, a 7-bits slave address plus a bit to instruct for read or write followed by an
acknowledge bit, a register address byte followed by an acknowledge bit, a data byte followed by an acknowledge bit and a stop condi-
tion. The device address, the register address and the data are all MSB first transferred. Each bit volume is prepared in during the SCL
is low, is latched-in by the rising edge of the SCL. The data byte is accepted and is put effective by the time that the last bit volume is
latched-in.
Innovative PowerTM
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