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ACT4910QW 参数 Datasheet PDF下载

ACT4910QW图片预览
型号: ACT4910QW
PDF下载: 下载PDF文件 查看货源
内容描述: [Power Loss Protection with 6A eFuse]
分类和应用:
文件页数/大小: 34 页 / 3110 K
品牌: ACTIVE-SEMI [ ACTIVE-SEMI, INC ]
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ACT4910QW  
Rev 1.0, 15-Sept-2017  
The ACT4910 allows for very flexible health checking  
routines by allowing the system to manually enable the  
uses an analog input multiplexer to select one of six  
channels for the A/D conversion. The resulting digital  
results are stored in six digital registers. A six to one  
multiplexer connects one of the ADC output registers to  
the user accessible register map.  
10mA  
discharge  
current  
by  
setting  
the  
EN_STR10mASINK bit = 1. In this situation, the system  
manually turns the discharge current on and off. The  
storage capacitor voltage threshold is still determined  
by the HMON_THR register. This function is useful for  
checking extremely large capacitor values which need  
very long discharge times.  
ADC Configuration  
The ACT4910 ADC is configured through the I2C  
interface. It is enabled and disabled by the EN_ADC  
register bit. The ADC has two conversion modes,  
manual single-shot conversion and automatic polling  
conversion.  
V
Storage CapVoltage  
VSTR  
PG_THR  
(Programmable)  
Pr ogramm able  
Interval Time  
Single-Shot Conversion  
Configure the IC for single-shot conversion mode by  
setting the following I2C bits in register 0x08h  
0
t
I
Pr ogramm able  
Discharge Time  
50mA  
ADC_ONE_SHOT = 1.  
ADC_CH_SCAN = 0  
EN_ADCBUF = 1  
200us  
Discharge Current  
10mA  
0
Top-Off  
Maintain  
t
Health Testing  
Initial Charge  
In single shot mode, the user defines the input channel  
to be converted and then manually initiates the ADC  
conversion. I2C bits ADC_CH_CONV [2:0] in register  
0x08h select the input channel to be converted.  
ADC_CH_READ [2:0] selects the ADC channel to be  
read. These should be set to the same channel. The  
user initiates an ADC read by writing a 1 into EN_ADC  
in register 0x08h. When ADC conversion is complete,  
the ADC_DATA_READY bit (register 0x07h [7]) is set to  
1, nIRQ is asserted low, and EN_ADC automatically  
changes back to 0. The uP can then read the status bits  
to find that the ADC conversion is complete. The ADC  
data are stored in ADC_DOUT [13:6] in register 0x05h.  
nIRQ stays asserted low and the ADC_READY_BIT  
stays equal to 1 until the ADC data is read. Reading the  
ADC data automatically deasserts nIRQ. To initiate  
another ADC conversion for the same channel, set  
EN_ADC=1. To initiate an ADC conversion for another  
Figure 6: Storage Voltage at Different Stages  
The register HMON_TSET [3:0] sets the health check  
discharge time as shown in Table 7. This also allows the  
use of the ADC to check the slope of the discharge and  
calculate the capacitance.  
Table 7: Health Check Discharge Time  
HMON_TSET[3] (ms)  
HMON_TSET[2:0]  
0
1
000  
001  
010  
011  
100  
101  
110  
111  
2
384  
512  
640  
768  
896  
1024  
1152  
1280  
4
8
16  
32  
64  
128  
256  
channel,  
change  
ADC_CH_CONV  
and  
ADC_CH_READ to the appropriate channel and then  
set EN_ADC=1.  
ADC Monitoring  
General Description  
The ACT4910 contains a built-in analog to digital con-  
verter, ADC, which can be used to monitor five system  
level parameters. These include input voltage, output  
voltage, storage capacitor voltage, eFuse current, and  
die temperature. It is a single 8 bit delta-sigma ADC that  
Innovative PowerTM  
ActiveSwitcherTM is a trademark of Active-Semi  
www.active-semi.com  
Copyright © 2017 Active-Semi, Inc.  
25  
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