ACT364
Rev 4, 14-Nov-12
FUNCTIONAL DESCRIPTION
As shown in the Functional Block Diagram, to
regulate the output voltage in CV (constant voltage)
mode, the ACT364 compares the feedback voltage
at FB pin to the internal reference and generates an
error signal to the pre-amplifier. The error signal,
after filtering out the switching transients and
compensated with the internal compensation
network, modulates the external NPN transistor
peak current at CS pin with current mode PFWM
(Pulse Frequency and Width Modulation) control.
To regulate the output current in CC (constant
current) mode, the oscillator frequency is modulated
by the output voltage.
increases to ramp up the switch current to bring the
secondary output back to regulation. The output
regulation voltage is determined by the following
relationship:
⎛
⎞
RFB1
RFB 2
NS
NA
⎜
⎟
⎟
VOUTCV = 2.20V × 1 +
×
− VD
(1)
⎜
⎝
⎠
where RFB1 (R5) and RFB2 (R6) are top and bottom
feedback resistor, NS and NA are numbers of
transformer secondary and auxiliary turns, and VD
is the rectifier diode forward drop voltage at
approximately 0.1A bias.
Standby (No Load) Mode
SW is a driver output that drives the emitter of an
external high voltage NPN transistor. This base-
emitter-drive method makes the drive circuit the
most efficient.
In no load standby mode, the ACT364 oscillator
frequency is further reduced to
a minimum
frequency while the current pulse is reduced to a
minimum level to minimize standby power. The
actual minimum switching frequency is
programmable with an output preload resistor.
Fast Startup
VDD is the power supply terminal for the ACT364.
During startup, the ACT364 typically draws only
20μA supply current. The startup resistor from the
rectified high voltage DC rail supplies current to the
base of the NPN transistor. This results in an
amplified emitter current to VDD through the SW
pin via Active-Semi's proprietary fast-startup
circuitry until it exceeds the VDDON threshold 19V. At
this point, the ACT364 enters internal startup mode
with the peak current limit ramping up in 10ms.
After switching starts, the output voltage begins to
rise. The VDD bypass capacitor must supply the
ACT364 internal circuitry and the NPN base drive
until the output voltage is high enough to sustain
VDD through the auxiliary winding. The VDDOFF
threshold is 5.5V; therefore, the voltage on the VDD
capacitor must remain above 5.5V while the output
is charging up.
Loop Compensation
The ACT364 integrates loop compensation circuitry
for simplified application design, optimized transient
response, and minimal external components.
Output Cable Resistance Compensation
The ACT364 provides programmable output cable
resistance compensation during constant voltage
regulation, monotonically adding an output voltage
correction up to predetermined percentage at full
power. There are four levels to program the output
cable compensation by connecting a resistor (R10
in Figure 3) from the SW pin to VDD pin. The
percentage at full power is programmable to be 3%,
6%, 9% or 12%, and by using a resistor value of
300k, 150k, 75k or 33k respectively. If there is no
resistor connection, there is no cord compensation.
Constant Voltage (CV) Mode Operation
This feature allows for better output voltage
accuracy by compensating for the output voltage
droop due to the output cable resistance.
In constant voltage operation, the ACT364 captures
the auxiliary flyback signal at FB pin through a
resistor divider network R5 and R6 in Figure 6. The
signal at FB pin is pre-amplified against the internal
reference voltage, and the secondary side output
voltage is extracted based on Active-Semi's
proprietary filter architecture.
Constant Current (CC) Mode Operation
When the secondary output current reaches a level
set by the internal current limiting circuit, the
ACT364 enters current limit condition and causes
the secondary output voltage to drop. As the output
voltage decreases, so does the flyback voltage in a
proportional manner. An internal current shaping
circuitry adjusts the switching frequency based on
the flyback voltage so that the transferred power
remains proportional to the output voltage, resulting
This error signal is then amplified by the internal
error amplifier. When the secondary output voltage
is above regulation, the error amplifier output
voltage decreases to reduce the switch current.
When the secondary output voltage is below
regulation, the error amplifier output voltage
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ACTIVE-SEMI [ ACTIVE-SEMI, INC ]
