Actel Fusion Mixed-Signal FPGAs
With Fusion, Actel also introduces the Analog Quad I/O structure (Figure
Each
quad consists of three analog inputs and one gate driver. Each quad can be configured in various
built-in circuit combinations, such as three prescaler circuits, three digital input circuits, a current
monitor circuit, or a temperature monitor circuit. Each prescaler has multiple scaling factors
programmed by FPGA signals to support a large range of analog inputs with positive or negative
polarity. When the current monitor circuit is selected, two adjacent analog inputs measure the
voltage drop across a small external sense resistor. Built-in operational amplifiers amplify small
voltage signals (2 mV sensitivity) for accurate current measurement. One analog input in each quad
can be connected to an external temperature monitor diode and achieves detection accuracy of
±3ºC. In addition to the external temperature monitor diode(s), a Fusion device can monitor an
internal temperature diode using dedicated channel 31 of the ADCMUX.
illustrates a typical use of the Analog Quad I/O structure. The Analog Quad
shown is configured to monitor and control an external power supply. The AV pad measures the
source of the power supply. The AC pad measures the voltage drop across an external sense resistor
to calculate current. The AG MOSFET gate driver pad turns the external MOSFET on and off. The AT
pad measures the load-side voltage level.
Power
Line Side
Load Side
Off-Chip
AV
Pads
Voltage
Monitor Block
AC
R
pullup
AG
Current
Monitor Block
Gate
Driver
AT
Temperature
Monitor Block
On-Chip
Analog Quad
Pre-
scaler
Pre-
scaler
Pre-
scaler
Digital
Input
Digital
Input
Current
Monitor/Instr
Amplifier
Power
MOSFET
Gate Driver
Digital
Input
Temperature
Monitor
To FPGA
(DAVOUTx)
To Analog MUX
To FPGA
(DACOUTx)
From FPGA
(GDONx)
To FPGA
(DATOUTx)
To Analog MUX
To Analog MUX
Figure 1-1 •
Analog Quad
Embedded Memories
Flash Memory Blocks
The flash memory available in each Fusion device is composed of one to four flash blocks, each 2
Mbits in density. Each block operates independently with a dedicated flash controller and
interface. Fusion flash memory blocks combine fast access times (60 ns random access and 10 ns
access in Read-Ahead mode) with a configurable 8-, 16-, or 32-bit datapath, enabling high-speed
Pr e li m i n a ry v1 . 7
1-5