Device Architecture
Read Operation
Read operations are designed to read data from the FB Array, Page Buffer, Block Buffer, or status
registers. Read operations support a normal read and a read-ahead mode (done by asserting
READNEXT). Also, the timing for Read operations is dependent on the setting of PIPE.
The following diagrams illustrate representative timing for Non-Pipe Mode (Figure 2-37) and Pipe
Mode (Figure 2-38) reads of the flash memory block interface.
CLK
REN
A0
A1
A2
A3
A4
ADDR[17:0]
DATAWIDTH[1:0]
BUSY
0
0
S0
S1
S2
S3
0
0
S4
STATUS[1:0]
RD[31:0]
D0 D1 D2
D3
D4
0
Figure 2-37 • Read Waveform (Non-Pipe Mode, 32-bit access)
CLK
REN
A0
A1
A2 A3
A4
ADDR[17:0]
DATAWIDTH[1:0]
BUSY
0
0
S0
S1
S2
S3
0
S4
D4
STATUS[1:0]
RD[31:0]
D0 D1 D2
D3
0
X
0
Figure 2-38 • Read Waveform (Pipe Mode, 32-bit access)
2-50
Preliminary v1.7